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TI-TMDS181.pdf
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HDMI重定时器
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IN_CLKp
IN_CLKn
IN_D[2:0]p
IN_D[2:0]n
50Q
50Q50Q
50Q
Data Registers
SWAP
PLL
PLL Control
SERDES
Polarity
VBIAS
VBIAS
OUT_CLKp
OUT_D[2:0]p
OUT_CLKn
OUT_D[2:0]n
EQ
EQ
SDA_CTL
SCL_CTL
VSADJ
TMDS
TMDS
ACTIVE DDC BLOCK
HPD_SNK
HPD_SRC
190<Q
SDA_SRC
SCL_SRC
SDA_SNK
SCL_SNK
SPDIF_IN
ARC_OUT
GND
VDD
VCC
1.2V
3.3V
VREG
GPU
HDMI
Conn
7.06 lQ
Control
6
DDC Snoop
Block
Control Block, I2C
Registers,
DDC. ARC
Local I2C
Control
ARC
Copyright © 2016, Texas Instruments Incorporated
Interface
Unit
Digital TV
Audiovisual
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Unit
HDMI
SW/HD
TMDS
181
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLASE75
TMDS181, TMDS181I
ZHCSE70D –AUGUST 2015–REVISED SEPTEMBER 2017
TMDS181x 6Gbps TMDS 重重定定时时器器
1
1 特特性性
1
• HDMI™ 输入端口与输出端口间具有时钟和数据恢
复 (CDR) 电路,支持高达 6Gbps 的数据速率
• 在重定时器模式下可兼容高达 6Gbps 的 HDMI™
电气参数
• 支持 4k2k60p 和高达 WUXGA 16 位色深或
1080p,具有更高的刷新率
• 对输入流重新定时以补偿随机抖动
• 自适应接收器均衡器或可编程固定均衡器
• I
2
C 和引脚设置可编程
• 5+ 位对内偏移补偿
• 支持单端模式 ARC
• 链路调试工具包括位于RX 均衡器之后眼图
• 48 引脚 7mm × 7mm 0.5mm 间距超薄型四方扁平
无引线 (VQFN) 封装
• 扩展商业温度范围为 0°C 至 85°C (TMDS181)
• 工业温度范围为 -40°C 至 85°C (TMDS181I)
2 应应用用
• 数字电视
• 数字投影仪
• 音频/视频设备
• Blu-Ray™DVD
• 监视器
• 台式机/一体化计算机
• 有源线缆
3 说说明明
TMDS181x 是一款数字视频接口 (DVI) 或高清多媒体
接口 (HDMI™) 重定时器。TMDS181x 支持四条
TMDS 通道,音频返回通道 (SPDIF_IN/ARC_OUT) 和
数字显示控制 (DDC) 接口。TMDS181x 支持高达
6Gbps 的信号传输速率,可实现最高分辨率达
4k2k60p 24 位/像素和高达 WUXGA 16 位色深或
1080p,并且具有较高的刷新率。TMDS181x 经配置
可支持 HDMI2.0a 标准。TMDS181x 在低于 1.0Gbps
的数据速率下会自动配置为重驱动器,而在高于该速率
时会自动配置为重定时器。重驱动器模式支持
HDMI1.4b,数据速率高达 3.4Gbps
TMDS181x 支持双电源轨(V
DD
为 1.2V,V
CC
为
3.3V),有助于降低功耗。该器件采用多种电源管理
方法来降低整体功耗。TMDS181x 通过 I
2
C 或引脚设
置支持固定的接收 EQ 增益或自适应接收 EQ 控制,
以补偿不同长度的输入电缆或电路板走线。
器器件件信信息息
(1)
器器件件型型号号 封封装装 封封装装尺尺寸寸((标标称称值值))
TMDS181
VQFN (48) 7.00mm × 7.00mm
TMDS181I
(1) 如需了解所有可用封装,请参阅产品说明书末尾的可订购产品
附录。
空白
简简化化电电路路原原理理图图
2
TMDS181, TMDS181I
ZHCSE70D –AUGUST 2015–REVISED SEPTEMBER 2017
www.ti.com.cn
版权 © 2015–2017, Texas Instruments Incorporated
目目录录
1 特特性性.......................................................................... 1
2 应应用用.......................................................................... 1
3 说说明明.......................................................................... 1
4 修修订订历历史史记记录录 ........................................................... 2
5 Pin Configuration and Functions......................... 4
6 Specifications......................................................... 6
6.1 Absolute Maximum Ratings ...................................... 6
6.2 ESD Ratings.............................................................. 6
6.3 Recommended Operating Conditions....................... 7
6.4 Thermal Information.................................................. 8
6.5 Power Supply Electrical Characteristics ................... 8
6.6 TMDS Differential Input Electrical Characteristics .... 9
6.7 TMDS Differential Output Electrical
Characteristics ......................................................... 10
6.8 DDC, I
2
C, HPD, and ARC Electrical
Characteristics ......................................................... 11
6.9 Power-Up and Operation Timing Requirements..... 12
6.10 TMDS Switching Characteristics........................... 13
6.11 HPD Switching Characteristics ............................. 14
6.12 DDC and I
2
C Switching Characteristics................ 14
6.13 Typical Characteristics.......................................... 15
7 Parameter Measurement Information ................ 15
8 Detailed Description............................................ 24
8.1 Overview ................................................................. 24
8.2 Functional Block Diagram ....................................... 25
8.3 Feature Description................................................. 25
8.4 Device Functional Modes........................................ 31
8.5 Register Maps......................................................... 33
9 Application and Implementation ........................ 40
9.1 Application Information............................................ 40
9.2 Typical Applications ................................................ 40
10 Power Supply Recommendations ..................... 47
11 Layout................................................................... 48
11.1 Layout Guidelines ................................................. 48
11.2 Layout Example .................................................... 49
12 器器件件和和文文档档支支持持 ..................................................... 50
12.1 文档支持................................................................ 50
12.2 相关链接................................................................ 50
12.3 接收文档更新通知 ................................................. 50
12.4 社区资源................................................................ 50
12.5 商标 ....................................................................... 50
12.6 静电放电警告......................................................... 50
12.7 Glossary................................................................ 50
13 机机械械、、封封装装和和可可订订购购信信息息....................................... 50
4 修修订订历历史史记记录录
注:之前版本的页码可能与当前版本有所不同。
Changes from Revision C (July 2016) to Revision D Page
• Added Note 5 to the Power Supply Electrical Characteristic table ....................................................................................... 8
• Deleted text "which is needed for certain HDMI CTS test." from the third paragraph in the Overview section .................. 24
• Changed section: Input Signal Detect Block ....................................................................................................................... 28
• Changed H to X in the first row of the HPD_SNK column in Table 12 ................................................................................ 47
• Changed the IN_Dx column in Table 12 ............................................................................................................................. 47
Changes from Revision B (April 2016) to Revision C Page
• Recommended Operating Conditions, Changed the CONTROL PINS section .................................................................... 7
• DDC, I
2
C, HPD, and ARC Electrical Characteristics, Changed the DDC AND I
2
C section ................................................. 11
Changes from Revision A (October 2015) to Revision B Page
• Recommended Operating Conditions, Added V
IL
"Low-level input voltage at HPD, OE" ...................................................... 7
• Recommended Operating Conditions, Moved pin OE From: V
IH
MIN value of 2 V To: V
IH
MIN value of 2.6 V ................... 7
• Power-Up and Operation Timing Requirements, Deleted the VDD_ramp and VCC_ramp MIN values ............................. 12
• Changed Figure 1 ................................................................................................................................................................ 12
• DDC Functional Description , Changed text "address 22h (see Figure 31) through the I2C interface." To: "address
0Bh through the I2C interface." ............................................................................................................................................ 32
• Added Note to 11–400-kbps in Table 6................................................................................................................................ 35
• Added Note to 11–400-kbps in Table 6................................................................................................................................ 36
3
TMDS181, TMDS181I
www.ti.com.cn
ZHCSE70D –AUGUST 2015–REVISED SEPTEMBER 2017
Copyright © 2015–2017, Texas Instruments Incorporated
Changes from Original (August 2015) to Revision A Page
• 已将器件状态从“产品预览”更新为“量产数据” .......................................................................................................................... 1
• Absolute Maximum Ratings, Changed max value from 1.56 V to VCC + 0.3V; added input current and Min value............. 6
• Absolute Maximum Ratings, Added Max Input Current on Main Link Differential Input pins................................................. 6
• Recommended Operating Conditions, Updated the note showing the values shown are only for Microcontroller
driven and not values based upon pull up or pull down resistors. ........................................................................................ 7
• Power Supply Electrical Characteristics, Increased Max Value of ISD2 from 10 to 15mA ................................................... 8
• TMDS Differential Input Electrical Characteristics, Changed Max Receiver impedance value to 115 ................................. 9
• DDC, I
2
C, HPD, and ARC Electrical Characteristics, Inserted values for SCL/SDA_SNK ................................................. 11
• TMDS Switching Characteristics, Changed from 6000 to 3400 .......................................................................................... 13
• Table 4, Deleted Clear and NA Access Tags ...................................................................................................................... 34
• Table 8, Removed reg20h[5:4] ARC_SWING ..................................................................................................................... 39
• Figure 35, Removed 1k pullup from switch as not needed ................................................................................................. 43
• Pin Strapping Configuration for HDMI2.0a and HDMI1.4b , Added Note for VSADJ resistor value in Compliance Pin
Strapping section ................................................................................................................................................................. 46
• Pin Strapping Configuration for HDMI2.0a and HDMI1.4b , Changed De-emphasis value from 0 dB to -2 dB for
recommended configuration for compliance testing............................................................................................................. 46
• I
2
C Control for HDMI2.0a and HDMI1.4b, Added Note for VSADJ resistor value in Compliance I2C control section
and included register that can increase or decrease the VOD swing ................................................................................. 46
GND
NC
VSADJ
HPD_SRC
SDA_SRC
SCL_SRC
GND
OUT_D0p
OUT_D0n
SDA_SNK
SCL_SNK
OE
VDD
VDD
TX_TERM_CTL
SCL_CTL
NC
SPDIF_IN
GND
SIG_EN
VDD
ARC_OUT
I2C_EN/PIN
VDD
VCC
VDD
VCC
GND
HPD_SNK
PRE_SEL
EQ_SEL/A0
SDA_CTL
IN_D1n
IN_D1p
IN_D2n
IN_D2p
IN_D0n
IN_D0p
IN_CLKn
IN_CLKp
OUT_D2p
OUT_D2n
OUT_D1p
OUT_D1n
OUT_CLKp
OUT_CLKn
A1
SWAP/POL
GND
1
9
8
7
6
5
4
3
2
40
31
32
33
34
35
36
3738
39
4142434445464748
30
29
28
27
26
25
21
2423
22
2019181716151413
10
11
12
4
TMDS181, TMDS181I
ZHCSE70D –AUGUST 2015–REVISED SEPTEMBER 2017
www.ti.com.cn
Copyright © 2015–2017, Texas Instruments Incorporated
5 Pin Configuration and Functions
RGZ Package
48-Pin VQFN
Top View
5
TMDS181, TMDS181I
www.ti.com.cn
ZHCSE70D –AUGUST 2015–REVISED SEPTEMBER 2017
Copyright © 2015–2017, Texas Instruments Incorporated
(1) (H) Logic high (pin strapped to VCC through 65 kΩ resistor); (L) Logic Low (pin strapped to GND through 65 kΩ resistor); (for mid-level
= No connect)
(2) G = Ground, I = Input, O = Output, P = Power
Pin Functions
(1)
PIN
TYPE
(2)
DESCRIPTION
NAME NO.
VCC 13, 43 P 3.3 V power supply
VDD 14, 23, 24, 37, 48 P 1.2 V power supply
GND
7, 19, 41, 30,
Thermal pad
G Ground
MAIN LINK INPUT PINS
IN_D2p/n 2, 3 I Channel 2 differential input
IN_D1p/n 5, 6 I Channel 1 differential input
IN_D0p/n 8, 9 I Channel 0 differential input
IN_CLKp/n 11, 12 I Clock differential input
MAIN LINK OUTPUT PINS (FAIL SAFE)
OUT_D2n/p 34, 35 O TMDS data 2 differential output
OUT_D1n/p 31, 32 O TMDS data 1 differential output
OUT_D0n/p 28, 29 O TMDS data 0 differential output
OUT_CLKn/p 25, 26 O TMDS data clock differential output
HOT PLUG DETECT PINS
HPD_SRC 4 O Hot plug detect output to source side
HPD_SNK 33 I Hot plug detect input from sink side
AUDIO RETURN CHANNEL AND DDC PINS
SPDIF_IN
ARC_OUT
45
44
I/O
SPDIF signal input
Audio return channel output
SDA_SRC
SCL_SRC
47
46
I/O
Source side TMDS port bidirectional DDC data line
Source side TMDS port bidirectional DDC clock line
SDA_SNK
SCL_SNK
39
38
I/O
Sink side TMDS port bidirectional DDC data line
Sink side TMDS port bidirectional DDC clock line
CONTROL PINS
OE 42 I
Operation enable/reset pin
OE = L: Power-down mode
OE = H: Normal operation
Internal weak pull up: Resets device when transitions from H to L
SIG_EN 17 I
Signal detector circuit enable
SIG_EN = L: Signal detect circuit disabled:
SIG_EN = H: Signal detect circuit enabled: When no valid clock device enters
standby mode.
Internal weak pull down
PRE_SEL 20
I
3 level
De-emphasis control when I2C_EN/PIN = Low.
PRE_SEL = L: –2 dB
PRE_SEL = No Connect: 0 dB
PRE_SEL = H: Reserved
When I2C_EN/PIN = High de-emphasis is controlled through I
2
C
EQ_SEL/A0 21
I
3 level
Input receive equalization pin strap when I2C_EN/PIN = Low
EQ_SEL = L: Fixed EQ at 7.5 dB at 3 GHz
EQ_SEL = No Connect: Adaptive EQ
EQ_SEL = H: Fixed at 14 dB at 3 GHz
When I2C_EN/PIN = High address bit 1
Note: 3 level for pin strap programming but 2 level when I
2
C address
I2C_EN/PIN 10 I
I2C_EN/PIN = High; puts device into I
2
C Control Mode
I2C_EN/PIN = Low; puts device into pin strap mode
Note: I
2
C CSR is addressable at all times, but features that can be controlled by pin
strapping can only be changed by I
2
C when this pin is pulled high
SCL_CTL 15 I
I
2
C clock signal
Note: When I2C_EN = Low Pin strapping takes priority and those functions cannot be
changed by I
2
C
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