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TI-DS64BR111.pdf
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DS64BR111
www.ti.com
SNLS343C –SEPTEMBER 2011–REVISED APRIL 2013
DS64BR111 Ultra Low Power 6.4 Gbps 2-Channel Repeaters with Input Equalization and
Output De-Emphasis
Check for Samples: DS64BR111
1
FEATURES
DESCRIPTION
The DS64BR111 is an extremely low power, high
2
• Two Channel Repeater for up to 6.4 Gbps
performance dual-channel repeater for serial links
– DS64BR111 : 1x Bidirectional Lane
with data rates up to 6.4 Gbps. The DS64BR111
• Low 65mW/Channel (Typical) Power
pinout is configured as one bidirectional lane (one
Consumption, with Option to Power Down
transmit, one receive channel).
Unused Channels
The DS64BR111 features a powerful 4-stage
• Advanced Signal Conditioning Features
continuous time linear equalizer (CTLE) to provide a
boost of up to +25 dB at 3.2 GHz and open an input
– Receive Equalization up to +25 dB
eye that is completely closed due to inter-symbol
– Transmit De-Emphasis up to -12 dB
interference (ISI) induced by the interconnect
– Transmit VOD Control: 700 to 1200 mVp-p
mediums such as an FR-4 backplane or AWG-30
cables. The transmitter features a programmable
– < 0.2 UI of Residual DJ at 6.4 Gbps
output de-emphasis driver with up to -12 dB and
• Programmable via Pin Selection, EEPROM or
allows amplitude voltage levels to be selected from
SMBus Interface
700 mVp-p to 1200 mVp-p to suit multiple application
• Single Supply Operation Selectable: 2.5V or
scenarios.
3.3v
The programmable settings can be applied via pin
• Flow-Thru Pinout in 4mmx4mm 24-Pin
settings, SMBus (I2C) protocol or an external
Leadless WQFN Package
EEPROM. When operating in the EEPROM mode,
the configuration information is automatically loaded
• >5kV HBM ESD Rating
on power up – This eliminates the need for an
• Industrial -40 to 85°C Operating Temperature
external microprocessor or software driver.
Range
Part of TI's PowerWise family of energy efficient
devices, the DS64BR111 consumes just 65
APPLICATIONS
mW/channel (typical), and allow the option to turn-off
• High-Speed Active Copper Cable Modules and
unused channels. This ultra low power consumption
FR-4 Backplane in Communication Systems
eliminates the need for external heat sinks and
• FC, SAS, SATA 3/6 Gbps (with OOB Detection),
simplifies thermal management in active cable
applications.
InfiniBand, CPRI, OBSAI, RXAUI and Many
Others
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2011–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
IN+
IN-
EQ
IDLE DETECT
OUTBUF
SMBus
VOD/ DE-EMPHASIS CONTROL
VDD
SMBus
Tx IDLE Enable
DEM
EQ[1:0]
OUT+
OUT-
50:50:
VOD
SMBus
LOS
Channel
Status
and
Control
SD_TH
TX_DIS
MODE
ASIC/FPGA
ASIC/FPGA
Interconnect
Cable
DS64BR111
DS64BR111
DS64BR111
SNLS343C –SEPTEMBER 2011–REVISED APRIL 2013
www.ti.com
Typical Application
Block Diagram - Detail View Of Channel (1 Of 2)
2 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: DS64BR111
INA+
INA-
OUTB+
VDD_SEL
VIN
18
INB+
INB-
17
14
13
16
LOS
VOD_SEL / READEN#
MODE / DONE#
SD_TH
OUTA+
OUTA-
OUTB-
SMBUS AND
CONTROL
15
VDD
24
23
22
21
20
19
11
12
8
10
9
7
EQB1/AD2
ENSMB
1
2
5
6
3
SCL/DEMB
EQB0/AD3
SDA/DEMA
4
VDD
TX_DIS
AD1/EQA1
AD0/EQA0
DS64BR111
www.ti.com
SNLS343C –SEPTEMBER 2011–REVISED APRIL 2013
Pin Diagram
(1) The center DAP on the package bottom is the device GND connection. This pad must be connected to GND through
multiple (minimum of 4) vias to ensure optimal electrical and thermal performance.
DS64BR111 Pin Diagram 24 lead
PIN DESCRIPTIONS
Pin Name Pin I/O, Type
(1)
Pin Description
Number
Differential High Speed I/O's
INA+, INA- , 24, 23 I, CML Inverting and non-inverting CML differential inputs to the equalizer. An on-chip
INB+, INB-, 11, 12 50Ω termination resistor connects INx+ to VDD and INx- to VDD when
enabled.
OUTA+, OUTA-, 7, 8 O,CML Inverting and non-inverting 50Ω driver outputs with de-emphasis. Compatible
OUTB+, OUTB-, 20, 19 with AC coupled CML inputs.
Control Pins
ENSMB 3 I, LVCMOS Float System Management Bus (SMBus) enable pin
Tie HIGH = Register Access, SMBus Slave mode
FLOAT = SMBus Master read from External EEPROM
Tie LOW = External Pin Control Mode
ENSMB = 1 (SMBUS MODE)
SCL 5 I, LVCMOS ENSMB Master or Slave mode
O, Open Drain SMBUS clock input pin is enabled. A clock input in Slave mode. Can also be a
clock output in Master mode.
SDA 4 I, LVCMOS, ENSMB Master or Slave mode
O, OPEN Drain The SMBus bidirectional SDA pin is enabled. Data input or open drain (pull-
down only) output.
(1) LVCMOS inputs without the “Float” conditions must be driven to a logic low or high at all times or operation is not specified. Unless the
"Float" level is desired; 4-Level input pins require a minimum 1K resistor to GND, VDD (in 2.5V mode), or VIN (in 3.3V mode). For
additional information, Table 1 Table 5
Input edge rate for LVCMOS/FLOAT inputs must be faster than 50 ns from 10–90%
Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: DS64BR111
DS64BR111
SNLS343C –SEPTEMBER 2011–REVISED APRIL 2013
www.ti.com
PIN DESCRIPTIONS (continued)
Pin Name Pin I/O, Type
(1)
Pin Description
Number
AD0-AD3 10, 9, 2, 1 I, LVCMOS Float ENSMB Master or Slave mode
(4-Levels) SMBus Slave Address Inputs. In SMBus mode, these pins are the user set
SMBus slave address inputs. There are 16 addresses supported by these
pins.
Pins must be tied LOW or HIGH when used to define the device SMBus
address.
Note: Setting VOD_SEL = High in SMBus Mode will force the Address =
B0'h
READEN# 17 I, LVCMOS When using an External EEPROM, a transition from high to low starts the load
from the external EEPROM
DONE# 18 IO, LVCMOS, EEPROM Download Status
Float HIGH indicates Error / Still Loading
(4-Levels) LOW indicates download complete. No Error.
ENSMB = 0 (PIN MODE)
EQA0, EQA1 10, 9 I, LVCMOS, Float EQA/B ,0/1 control the level of equalization of each channel. The EQA/B pins
EQB0, EQB1 1, 2 (4-Levels) are active only when ENSMB is de-asserted (LOW).
When ENSMB goes high the SMBus registers provide independent control of
each lane, and the EQB0/B1 pins are converted to SMBUS AD2/AD3 inputs.
DEMA, DEMB 4, 5 IO, LVCMOS, DEMA/B controls the level of de-emphasis. The DEMA/B pins are only active
Float when ENSMB is de-asserted (LOW). Each of the 4 A/B channels have the
(4-Levels) same level unless controlled by the SMBus control registers. When ENSMB
goes high the SMBus registers provide independent control of each lane and
the DEM pins are converted to SMBUS SCL and SDA pins.
TX_DIS 6 I, LVCMOS DS64BR111
High = OUTA Enabled / OUTB Disabled
Low = OUTA/B Enabled
VOD_SEL 17 I, LVCMOS, Float EQ Mode and VOD select.
(4-Levels) High = (VOD = 1.1V/1.3V)
Float = (VOD = 1.0 V)
20K = (VOD = 1.2 V)
Low = (VOD = 700m V)
Note: DS64BR111 OUTA is limited to 700mV in pin mode, see Table 4 for
additional information.
Note: Setting VOD_SEL = High in SMBus Mode will force the SMBus
Address = B0'h
VDD_SEL 16 I, Internal Pull-up Enables the 3.3V to 2.5V internal regulator
Low = 3.3 V Operation
Float = 2.5 V Operation
MODE 18 I, LVCMOS Controls Device Mode of Operation
High = Continuous Talk
Float = Slow OOB
20KΩ = eSATA Mode, Fast OOB, Auto Low Power on 100 uS of inactivity. SD
stays active.
Low = SAS Mode, Fast OOB
Status Output
LOS 13 O, Open Drain Indicates Loss of Signal (Default is LOS on INA). Can be modified via SMBus
registers.
LOS Threshold Input
SD_TH 14 I, LVCMOS, Float The SD_TH pin controls LOS threshold setting;
(4-Levels) Assert (mV), Deassert (mV)
20K = 160 mV, 100 mV
Float = 180 mV, 110 mV (Default)
High = 190 mV, 130 mV
Low = 210 mV, 150 mV
Note: Using values less than the default level can extend the time
required to detect LOS and are not recommended.
Power
4 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: DS64BR111
DS64BR111
www.ti.com
SNLS343C –SEPTEMBER 2011–REVISED APRIL 2013
PIN DESCRIPTIONS (continued)
Pin Name Pin I/O, Type
(1)
Pin Description
Number
VDD 21, 22 Power Power supply pins
2.5V mode connect to 2.5V
3.3V mode do not connect to any supply voltage. Should be used to attach
external decoupling to device. 100 - 200 nF recommended.
Note: See APPLICATION INFORMATION for additional information.
VIN 15 Power VIN = 3.3V +/-10% (input to internal LDO regulator)
Note: Must FLOAT for 2.5V operation. See APPLICATION INFORMATION
for additional information.
GND DAP Power Ground pad (DAP - die attach pad).
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
(1)(2)
Supply Voltage (VDD) -0.5V to +2.75V
Supply Voltage (VIN) -0.5V to +4.0V
LVCMOS Input/Output Voltage -0.5V to +4.0V
CML Input Voltage -0.5V to (VDD+0.5)
CML Input Current -30 to +30 mA
Junction Temperature 125°C
Storage Temperature -40°C to +125°C
ESD Rating
HBM, STD - JESD22-A114F > 5 kV
MM, STD - JESD22-A115-A 100 V
CDM, STD - JESD22-C101-D 1250 V
Package Thermal Resistance
θJC 3.2°C/W
θJA, No Airflow, 4 layer JEDEC 33.0°C/W
For soldering specifications:
See product folder at www.ti.com
http://www.ti.com/lit/SNOA549
(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. Absolute
Maximum Numbers are specified for a junction temperature range of -40°C to +125°C. Models are validated to Maximum Operating
Voltages only.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for
availability and specifications.
RECOMMENDED OPERATING CONDITIONS
Min Typ Max Units
Supply Voltage (2.5V 2.375 2.5 2.625 V
Mode)
Supply Voltage (3.3V 3.0 3.3 3.6 V
Mode)
Ambient Temperature -40 25 +85 °C
SMBus (SDA, SCL) 3.6 V
Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: DS64BR111
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