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TI-PAL16R8AM.pdf
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TI-PAL16R8AM.pdf
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PAL16L8AM, PAL16L8A-2M, PAL16R4AM, PAL16R4A-2M
PAL16R6AM, PAL16R6A-2M, PAL16R8AM, PAL16R8A-2M
STANDARD HIGH-SPEED PAL
CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1992, Texas Instruments Incorporated
1
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• Choice of Operating Speeds
High-Speed, A Devices . . . 25 MHz Min
Half-Power, A-2 Devices . . . 16 MHz Min
• Choice of Input/Output Configuration
• Package Options Include Both Ceramic DIP
and Chip Carrier in Addition to Ceramic
Flat Package
DEVICE
I
INPUTS
3-STATE
O OUTPUTS
REGISTERED
Q OUTPUTS
I/O
PORT
S
PAL16L8 10 2 0 6
PAL16R4 8 0 4 (3-state buffers) 4
PAL16R6 8 0 6 (3-state buffers) 2
PAL16R8 8 0 8 (3-state buffers) 0
description
These programmable array logic devices feature
high speed and a choice of either standard or
half-power devices. They combine Advanced
Low-Power Schottky technology with proven
titanium-tungsten fuses. These devices will
provide reliable, high-performance substitutes for
conventional TTL logic. Their easy
programmability allow for quick design of ”custom”
functions and typically results in a more compact
circuit board. In addition, chip carriers are
available for further reduction in board space.
The Half-Power versions offer a choice of
operating frequency, switching speeds, and
power dissipation. In many cases, these
Half-Power devices can result in significant power
reduction from an overall system level.
The PAL16’ M series is characterized for
operation over the full military temperature range
of –55°C to 125°C.
PAL is a registered trademark of Advanced Micro Devices Inc.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
I
I
I
I
I
I
I
I
I
GND
V
CC
O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
PAL16L8’
J OR W PACKAGE
(TOP VIEW)
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
PAL16L8’
FK PACKAGE
(TOP VIEW)
I
I
I
O
I/O
O
I
GND
I
V
CC
![](https://csdnimg.cn/release/download_crawler_static/87213036/bg2.jpg)
PAL16R4AM, PAL16R4A-2M, PAL16R6AM, PAL16R6A-2M, PAL16R8AM, PAL16R8A-2M
STANDARD HIGH-SPEED PAL
CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
CLK
I
I
I
I
I
I
I
I
GND
V
CC
I/O
I/O
Q
Q
Q
Q
I/O
I/O
OE
(TOP VIEW)
PAL16R4’
J OR W PACKAGE
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
CLK
I
I
I
I
I
I
I
I
GND
V
CC
I/O
Q
Q
Q
Q
Q
Q
I/O
OE
(TOP VIEW)
PAL16R6’
J OR W PACKAGE
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
CLK
I
I
I
I
I
I
I
I
GND
V
CC
Q
Q
Q
Q
Q
Q
Q
Q
OE
(TOP VIEW)
PAL16R8’
J OR W PACKAGE
I
I
CLK
I/O
I/O
I/O
I
GND
V
CC
OE
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
I/O
Q
Q
Q
Q
I
I
I
I
I
(TOP VIEW)
PAL16R4’
FK PACKAGE
I
I
CLK
I/O
Q
I/O
I
GND
V
CC
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
Q
Q
Q
Q
Q
I
I
I
I
I
(TOP VIEW)
OE
PAL16R6’
FK PACKAGE
I
I
CLK
Q
Q
Q
I
GND
V
CC
OE
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
Q
Q
Q
Q
Q
I
I
I
I
I
(TOP VIEW)
PAL16R8’
FK PACKAGE
![](https://csdnimg.cn/release/download_crawler_static/87213036/bg3.jpg)
PAL16L8AM, PAL16L8A-2M, PAL16R4AM, PAL16R4A-2M
STANDARD HIGH-SPEED PAL
CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
functional block diagrams (positive logic)
denotes fused inputs
PAL16L8AM
PAL16L8A-2M
PAL16R4AM
PAL16R4A-2M
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I
EN
≥1
&
32 X 64
10 16
166
7
7
7
7
7
7
7
7
6
16 x
Q
I/O
I/O
I/O
I/O
I
EN
816
164
7
7
7
8
8
8
7
4
16 x
≥1
&
32 X 64
≥1
8
Q
Q
Q
4
1D
I = 0
2
CLK
C1
EN 2
OE
4
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