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LMP7312

www.ti.com

SNOSB32B –MARCH 2010–REVISED MARCH 2013

LMP7312 Precision SPI-Programmable AFE with Differential/Single-Ended Input/Output

Check for Samples: LMP7312

FEATURES

DESCRIPTION

The LMP7312 is a digitally programmable variable

• Typical Values, T

= 25°C, V

=5V, V

=0V.

gain amplifier/attenuator. Its wide input voltage range

• Gain Bandwidth 1 MHz

and superior precision make it a prime choice for

• Input Voltage Range (G= 0.096 V/V) -15V to

applications requiring high accuracy such as data

+15V

acquisition systems for IO modules in programmable

logic control (PLC). The LMP7312 provides a

• Core Op-Amp Input Offset Voltage 100 µV

differential output to maximize dynamic range and

(Max)

signal to noise ratio, thereby reducing the overall

• Supply Current 2 mA (Max)

system error. It can also be configured to handle

• Gain (Attenuation Mode) 0.096 V/V, 0.192

single ended input data converters by means of the

OCM

pin (see Application Section for details). The

V/V0.384 V/V, 0.768 V/V

inputs of LMP7312 can be configured in attenuation

• Gain (Amplification Mode) 1 V/V, 2 V/V

mode to handle large input signals of up to +/- 15V,

• Gain Error 0.035% (Max)

as well as in amplification mode to handle current

• Core Op-Amp PSRR 90 dB (Min) loops of 0-20mA and 4-20mA.The LMP7312 is

equipped with a null switch to evaluate the offset of

• CMRR 80 dB (min)

the internal amplifier. A ensured 0.035% maximum

• Adjustable Output Common Mode 1V to 4V

gain error (for all gains) and a maximum gain drift of

• Temperature Range −40 to 125°C

5ppm over the extended industrial temperature range

(-40° to 125°C) make the LMP7312 very attractive for

• Package 14-Pin SOIC

high precision systems even under harsh conditions.

A low input offset voltage of 100µV and low voltage

APPLICATIONS

noise of 3µVpp give the LMP7312 a superior

• Signal Conditioning AFE

performance. The LMP7312 is fully specified from -

40° to 125°C and is available in SOIC-14 package.

– ±10V; ±5V; 0-5V; 0-10V; 0-20mA; 4-20mA

• Data Acquisition Systems

• Motor Control

• Instrument and Process Control

• Remote Sensing

• Programmable Automation Control

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

LMP7312

www.ti.com

SNOSB32B –MARCH 2010–REVISED MARCH 2013

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1)(2)

ESD Rating

(3)

Human Body Model 2000V

Machine Body Model 150V

Charge device Model 1000V

Analog Supply Voltage (V

= V

- V

) 6V

DigitaI Supply Voltage (V

DIO

-V

) 6V

Attenuation pins -V

, +V

referred to V

±17.5V

Amplification pins -IN, +IN referred to V

±10V

Voltage at all other pins referred to V

Storage Temperature Range -65°C to 150°C

For soldering specification: http://www.ti.com/lit/SNOA549

Junction Temperature 150°C

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is intended to be functional, but for which specific performance is not ensured. For ensured specifications and the test

conditions, see Electrical Characteristics.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and

specifications.

(3) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22–A115–A (ESD MM std. of

JEDEC). Field-Induced Charge-Device Model, applicable std. JESD22–C101–C (ESD FICDM std. of JEDEC).

Operating Ratings

(1)

Analog Supply Voltage (V

= V

– V

), V

=0V 4.5V to 5.5V

Digital Supply Voltage (V

DIO

= V

– V

), V

=0V 2.7V to 5.5V

Attenuation pins -V

, +V

referred to V

-15V to 15V

Amplification pins -IN, +IN referred to V

-2.35V to 7.35V

Temperature Range

(2)

−40°C to 125°C

Package Thermal Resistance

(2)

SOIC-14 145°C/W

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is intended to be functional, but for which specific performance is not ensured. For ensured specifications and the test

conditions, see Electrical Characteristics.

(2) The maximum power dissipation is a function of TJ(max), θJA. The maximum allowable power dissipation at any ambient temperature

is: PD(max) = (TJ(max) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.

5V Electrical Characteristics

(1)

Unless otherwise specified, all limits ensured for T

= 25°C, V

= 5V, V

−

= 0V, G = 0.192 V/V, V

CM_ATT

=(+V

+(-

))/2, V

CM_AMP

=(+IN+(-IN))/2. Differential output configuration. SE = Single Ended Output, DE = Differential Output.Boldface

limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(2)

Typ

(3)

Max

(2)

Units

Core op-amp Input Nulling Switch Mode, DE, V

OCM

= 1V; –100 100

Offset Voltage Nulling switch Mode, SE, -V

OUT

= 1V –250 250

µV

Nulling Switch Mode, DE, V

OCM

= 4V; –100 100

Nulling Switch Mode, SE, -V

OUT

= 4V –250 250

(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very

limited self-heating of the device such that T

= T

. No ensured specification of parametric performance is indicated in the electrical

tables under conditions of internal self-heating where T

> T

(2) All limits are specified by testing, design, or statistical analysis.

(3) Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and

will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production

material.

Product Folder Links: LMP7312

LMP7312

SNOSB32B –MARCH 2010–REVISED MARCH 2013

www.ti.com

5V Electrical Characteristics

(1)

(continued)

Unless otherwise specified, all limits ensured for T

= 25°C, V

= 5V, V

−

= 0V, G = 0.192 V/V, V

CM_ATT

=(+V

+(-

))/2, V

CM_AMP

=(+IN+(-IN))/2. Differential output configuration. SE = Single Ended Output, DE = Differential Output.Boldface

limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(2)

Typ

(3)

Max

(2)

Units

TCV

Core op-amp Input Nulling Switch Mode, DE, V

OCM

= 1V; -3 ±1.5 3

Offset Voltage

(4)

Nulling Switch Mode, SE, -V

OUT

= 1V

µV/°C

Nulling Switch Mode, DE, V

OCM

= 4V; -3 ±1.5 3

Nulling Switch Mode, SE, -V

OUT

= 4V

All gains, R

= 10 kΩ, C

= 50pF, SE / DE –0.035 0.035

Gain Error %

–0.045 0.045

Gain Drift SE / DE -5 ±1 5 ppm/°C

Core op-amp Voltage RTI, Nulling Switch Mode, f = 10 kHz 7.25

nV/√Hz

Noise Density

Core op-amp Peak to RTI, Nulling Switch Mode, f= 0.1Hz to 10Hz 3

µV

Peak Voltage Noise

Analog Supply Current +V

= −V

= V

OCM

2 mA

VIO

Digital Supply Current Without any load connected to SDO pin 120 μA

IN_CM

CM Input Resistance G= 0.192 V/V 62.08 kΩ

G= 1 V/V 40

IN_DIFF

Differential Input G= 0.192 V/V 248.3 kΩ

Resistance

G= 1 V/V 160

G= 0.096V/V, -15V < V

CM_ATT

< 15V, SE / DE

G= 0.192V/V, -11.4V < V

CM_ATT

< 15V, SE / DE

G= 0.384V/V, -6V < V

CM_ATT

< 11V, SE / DE

DC Common Mode 80

CMRR dB

Rejection Ratio 77

G= 0.768V/V, -3V < V

CM_ATT

< 8V, SE / DE

G= 1V/V, -2.3V < V

CM_AMP

< 7.3V, SE / DE

G= 2V/V, -1.15V < V

CM_AMP

< 6.15V, SE / DE.

PSRR Core op-amp DC Nulling Switch Mode, 4.5V <V

<5.5V 90 dB

Power Supply Rejection

Ratio

OCM_OS

OCM

Output Offset

(5)

OCM

= 2.5 V -20 20 mV

OUT

Positive Output Voltage R

= 10 kΩ, C

= 50 pF, V

−0.2

Swing +V

= 15V, -V

= -15V

Negative Output R

= 10 kΩ, C

= 50 pF, V

−

+0.2

Voltage Swing +V

= -15V, -V

= 15V

= -V

= 2.5V, +V

OUT

, -V

OUT

connected 10

Short circuit current

individually to either V

or V

OUT

Current limitation Internal current limiter 55

Attenuation Mode, G = 0.096 V/V, R

=10 kΩ, 1.2

= 50 pF

MHz

Attenuation Mode, G = 0.192 V/V, R

= 10 kΩ, 1.0

= 50 pF

Attenuation Mode, G = 0.384 V/V, R

= 10 kΩ, 560

= 50 pF

GBW Bandwidth kHz

Attenuation Mode, G = 0.768 V/V, R

= 10 kΩ, 310

= 50 pF

Amplification Mode, G = 1 V/V, R

= 10 kΩ, 530

= 50 pF

kHz

Amplification Mode, G = 2 V/V, R

= 10 kΩ, 280

= 50 pF

(4) Offset voltage temperature drift is determined by dividing the change in V

at the temperature extremes by the total temperature

change.

(5) V

OCM_OS

is the difference between the Output Common mode voltage (+V

OUT

+(-V

OUT

))/2 and the Voltage on the V

OCM

pin.

Product Folder Links: LMP7312

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