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TI-DRV2624.pdf
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TI-DRV2624.pdf
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![](https://csdnimg.cn/release/download_crawler_static/87010084/bg1.jpg)
I
2
C
I/F
REG
Back-EMF
Detection
Control and Playback Engine
M
LRA
or
ERM
OUT±
GND
REG
TRIG/INTZ
SDA
SCL
NRST
Supply
Correction
Automatic
Over-Drive
and Braking
Gate
Drive
VDD
Automatic Resonance Tracking
and Reporting
Waveform Shape
Select (LRA)
Gate
Drive
VDD
OUT+
VDD
RAM
1 kB
2.7 V ± 5.5 V
1.8 V
Loopable
Waveform
Sequencer
Dynamic and
Programmable
Output Clamp
Impedance
Based Actuator
Diagnostics
Short Circuit
Protection
Off-
Resonance
Driving (LRA)
Thermal
Protection
Battery
Monitor
Reg
Map
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLOS893
DRV2624
ZHCSEH2A –DECEMBER 2015–REVISED DECEMBER 2015
DRV2624 超超低低功功耗耗闭闭环环 LRA/ERM 触触觉觉驱驱动动器器,,具具有有内内部部存存储储器器
1
1 特特性性
1
• 超低功耗关断模式
• 低功耗待机状态
• 基于电阻的执行器诊断
• SimpleDrive 单线制振动方案
• 自动谐振跟踪和报告
• 自动过驱动和制动
• 自动级别校准
• 可在电池放电过程进行驱动补偿
• 可配置电池监视器和电源保护
• 具有自动制动的非谐振驱动
• LRA 波形形状选择
• 集成随机存取存储器 (RAM)
• 实时回放 (RTP) 模式
• I
2
C 控制的数字回放引擎
• 硬件和软件触发器选项
• 通过自动制动自动切换到待机模式
• 可选中断引脚
• 1.8V 兼容、VDD 耐压数字接口
(1)
正在申请专利的控制算法
(1) 要了解所有可用封装,请见数据表末尾的可订购产品附录。
2 应应用用范范围围
• 移动电话
• 平板电脑
3 说说明明
DRV2624 器件是一款触觉驱动器,依赖于专有闭环架
构提供敏锐、强劲且恒定的触觉效果,同时实现功率最
优化。
该器件具有内置存储器和可循环波形序列器,以及自动
过驱和制动功能,可轻松生成清晰优质的触觉效果,从
而减轻了处理单元的负担。
DRV2624 器件 特有 自动进入待机状态功能和电池保
护功能,无需用户干预即可帮助降低功耗。通过
NRST 引脚可使器件进入完全关断状态,从而节省更
多的电能。
通过波形形状选择可以实现正弦波和方波驱动,从而定
制触感和可闻性能。具有自动制动的非谐振驱动简化了
非谐振触觉解决方案的实现。
器器件件信信息息
(1)
器器件件名名称称 封封装装 封封装装尺尺寸寸((最最大大值值))
DRV2624 DSBGA (9) 1.498mm × 1.361mm
简简化化电电路路原原理理图图
![](https://csdnimg.cn/release/download_crawler_static/87010084/bg2.jpg)
2
DRV2624
ZHCSEH2A –DECEMBER 2015–REVISED DECEMBER 2015
www.ti.com.cn
Copyright © 2015, Texas Instruments Incorporated
目目录录
1 特特性性.......................................................................... 1
2 应应用用范范围围................................................................... 1
3 说说明明.......................................................................... 1
4 修修订订历历史史记记录录 ........................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Timing Requirements................................................ 5
6.7 Switching Characteristics.......................................... 5
6.8 Typical Characteristics.............................................. 7
7 Parameter Measurement Information .................. 9
7.1 Test Setup for Graphs............................................... 9
8 Detailed Description............................................ 10
8.1 Overview ................................................................. 10
8.2 Functional Block Diagram ....................................... 10
8.3 Feature Description................................................. 10
8.4 Device Functional Modes........................................ 20
8.5 Operation During Exceptional Conditions............... 22
8.6 Programming........................................................... 23
8.7 Register Map........................................................... 36
9 Application and Implementation ........................ 62
9.1 Application Information............................................ 62
9.2 Typical Application ................................................. 63
9.3 Initialization Set Up ................................................. 66
10 Power Supply Recommendations ..................... 68
11 Layout................................................................... 69
11.1 Layout Guidelines ................................................. 69
11.2 Layout Examples................................................... 69
12 器器件件和和文文档档支支持持 ..................................................... 70
12.1 器件支持................................................................ 70
12.2 商标....................................................................... 70
12.3 静电放电警告......................................................... 70
12.4 Glossary................................................................ 70
13 机机械械、、封封装装和和可可订订购购信信息息....................................... 71
4 修修订订历历史史记记录录
注:之前版本的页码可能与当前版本有所不同。
Changes from Original (December 2015) to Revision A Page
• 已将数据表状态从“产品预览”更改为“量产数据”....................................................................................................................... 1
![](https://csdnimg.cn/release/download_crawler_static/87010084/bg3.jpg)
OUT+REG
TRIG/
INTZ
GNDNRSTSDA
OUT-VDDSCL
1 2 3
C
B
A
3
DRV2624
www.ti.com.cn
ZHCSEH2A –DECEMBER 2015–REVISED DECEMBER 2015
版权 © 2015, Texas Instruments Incorporated
5 Pin Configuration and Functions
YFF Package
9-Pin DSBGA
Top View
Table 1. Pin Functions
PIN
I/O DESCRIPTION
NAME NO.
VDD C2 P Supply input (2.7 V to 5.5 V). A 0.1-µF capacitor is required.
GND B3 P Supply ground
REG A2 O 1.8 V regulator output. A 0.1-µF capacitor is required
OUT- C3 O Negative haptic driver differential output
OUT+ A3 O Positive haptic driver differential output
SDA B1 I/O I
2
C data
SCL C1 I I
2
C clock
TRIG/INTZ A1 I/O
Multi-mode pin. Selectable as input trigger (pulse), input enable, or output interrupt. This pin
has an internal pull-down.
If pin is not used, it should be connected to ground.
NRST B2 I
Device reset pin (shutdown mode). If pin is not used, it should be connected to VDD (no
internal pull-up or pull-down).
![](https://csdnimg.cn/release/download_crawler_static/87010084/bg4.jpg)
4
DRV2624
ZHCSEH2A –DECEMBER 2015–REVISED DECEMBER 2015
www.ti.com.cn
Copyright © 2015, Texas Instruments Incorporated
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN MAX UNIT
Supply Voltage V
DD
–0.3 6 V
Input voltage
NRST –0.3 6 V
SDA –0.3 6 V
SCL –0.3 6 V
TRIG/INTZ –0.3 6 V
Operating free-air temperature range, T
A
–40 85 °C
Operating junction temperature range, T
J
–40 150 °C
Storage temperature, T
stg
–65 150 °C
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings
MIN MAX UNIT
V
(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
pins
(1)
–1500 1500
V
Charged device model (CDM), per JEDEC specification
JESD22-C101, all pins
(2)
–500 500
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
V
DD
Supply voltage 2.7 5.5 V
R
L
Load impedance 8 Ω
C
L
Load capacitance 100 pF
ƒ
(LRA)
LRA frequency 45 300 Hz
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.4 Thermal Information
THERMAL METRIC
(1)
DRV2625
UNITDSBGA
9 PINS
R
θJA
Junction-to-ambient thermal resistance 107 °C/W
R
θJC(top)
Junction-to-case (top) thermal resistance 0.9 °C/W
R
θJB
Junction-to-board thermal resistance 18.1 °C/W
ψ
JT
Junction-to-top characterization parameter 3.8 °C/W
ψ
JB
Junction-to-board characterization parameter 18.1 °C/W
R
θJC(bot)
Junction-to-case (bottom) thermal resistance — °C/W
![](https://csdnimg.cn/release/download_crawler_static/87010084/bg5.jpg)
5
DRV2624
www.ti.com.cn
ZHCSEH2A –DECEMBER 2015–REVISED DECEMBER 2015
版权 © 2015, Texas Instruments Incorporated
6.5 Electrical Characteristics
T
A
= 25 °C, V
DD
= 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
(REG)
Voltage at the REG pin 1.84 V
I
IL
Digital low-level input current
NRST, TRIG/INTZ, SDA, SCL
V
DD
= 5.5 V, V
I
= 0 V
100 nA
I
IH
Digital high-level input current
SDA, SCL
V
DD
= 5.5 V, V
I
= V
DD
0.1
µA
NRST
V
DD
= 5.5 V, V
I
= V
DD
1
TRIG/INTZ
V
DD
= 5.5 V, V
I
= V
DD
2.7 3.5
V
IL
Digital low-level input voltage NRST, TRIG/INTZ, SDA, SCL 0.4 V
V
IH
Digital high-level input voltage NRST, TRIG/INTZ, SDA, SCL 1.41 V
V
OL
Digital low-level output voltage
TRIG/INTZ, SDA
3-mA sink current
0.4 V
R
DS(on)
Drain-source on-state resistance (LS +
HS)
0.75 Ω
I
(SD)
Shutdown current V
(NRST)
= 0 V 105 180 nA
I
(STBY)
Standby current
V
(NRST)
= V
DD
In stand-by mode
1.55 2 µA
I
(Q)
Quiescent current
V
(NRST)
= V
DD
In idle mode - no signal
2.5 mA
Z
O(SD)
Output impedance in shutdown OUT+ to GND, OUT– to GND 15 kΩ
Z
O(STBY)
Output impedance in standby OUT+ to GND, OUT– to GND 15 kΩ
Z
LOAD(th)
Load impedance threshold for over-
current detection
OUT+ to GND, OUT– to GND 4 Ω
6.6 Timing Requirements
T
A
= 25 °C, V
DD
= 3.6 V (unless otherwise noted)
MIN NOM MAX UNIT
ƒ
(SCL)
Frequency at the SCL pin with no wait states 400 kHz
t
w(H)
Pulse duration, SCL high 0.6 µs
t
w(L)
Pulse duration, SCL low 1.3 µs
t
su(1)
Setup time, SDA to SCL 100 ns
t
h(1)
Hold time, SCL to SDA 10 ns
t
(BUF)
Bus free time between stop and start condition 1.3 µs
t
su(2)
Setup time, SCL to start condition 0.6 µs
t
h(2)
Hold time, start condition to SCL 0.6 µs
t
su(3)
Setup time, SCL to stop condition 0.6 µs
6.7 Switching Characteristics
T
A
= 25 °C, V
DD
= 3.6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
(on)
Device startup time from shutdown standby 1 ms
t
(start)
Waveform startup time from trigger to output signal 1 ms
f
O(PWM)
PWM output frequency (in OUT+
and OUT-)
20.5 kHz
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