DRV411
www.ti.com.cn
ZHCSBD8A –AUGUST 2013–REVISED AUGUST 2013
ELECTRICAL CHARACTERISTICS
At T
A
= +25°C, V
DD
= +2.7 V to +5.5 V, and zero output current I
COMP
, unless otherwise noted.
DRV411
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
HALL ELEMENT EXCITATION / AMPLIFICATION
T
A
= –40°C to +125°C, GSEL [00,01,10] 0.7 0.8 0.95 V
V
EX
Hall sensor excitation voltage
T
A
= –40°C to +125°C, GSEL [1,1] 0.6 0.74 0.95 V
I
EX
Hall sensor excitation current T
A
= –40°C to +125°C 10 mA
f
spin
Excitation switching frequency 1 MHz
GSEL [0,0]
(1)
, f
Zero
= 3.8 kHz 250 V/V
AOL
FB
Front-end open-loop flatband gain GSEL [0,1], f
Zero
= 7.2 kHz 250 V/V
GSEL [1,0], f
Zero
= 3.8 kHz 1000 V/V
T
A
= –40°C to +125°C,
AOL Front-end open-loop gain 94 120 dB
GSEL [00,01,10,11]
No Hall sensor, GSEL [00, 01, 10] 20 100 µV
V
OS_FE
Front-end voltage offset
GSEL [1,1] 5 12 mV
T
A
= –40°C to +125°C, no Hall sensor,
0.2 µV/°C
GSEL [00,01,10]
dV
OS_FE
/dT Front-end voltage offset drift
T
A
= –40°C to +125°C, GSEL [1,1] 5 µV/°C
GBWP Gain-bandwidth product GSEL [1,1] 14 MHz
CMRR Common-mode-rejection ratio GSEL [1,1], V
CM
= 0 V to VDD – 1.8 V 300 µV/V
Error comparator threshold 50 mV
DIFFERENTIAL AMPLIFIER
V
OS
Input offset voltage, RTO
(2) (3)
V
IN1
= V
IN2
= V
REFIN
±0.01 ±0.1 mV
dV
OS
/dT Input offset voltage drift, RTO T
A
= –40°C to +125°C ±0.4 ±2 µV/°C
CMRR vs common-mode voltage, RTO V
CM
= −1 V to V
DD
+ 1 V, V
REF
= V
DD
/ 2 ±50 ±250 µV/V
PSRR vs power-supply, RTO V
DD
= +2.7 V to +5.5 V, V
CM
= V
REFIN
±4 ±50 µV/V
V
CM
Common-mode input range –1 V
DD
+ 1 V
Differential impedance 16.5 20 23.5 kΩ
Common-mode impedance 40 50 60 kΩ
External reference input impedance 40 50 60 kΩ
G Gain, V
OUT
/V
IN_DIFF
T
A
= –40°C to +125°C 4 V/V
G
ERR
Gain error ±0.02% ±0.3%
Gain error drift T
A
= –40°C to +125°C ±1 ±5 ppm/°C
Linearity error R
L
= 1 kΩ 12 ppm
Voltage output swing from negative rail
(3)
I = +2.5 mA, V
DD
= 5 V, comparator trip
48 85 mV
(OR pin trip level) level
Voltage output swing from positive rail
(3)
I = –2.5 mA, V
DD
= 5 V, comparator trip
V
DD
– 85 V
DD
– 48 mV
(OR pin trip level) level
V
OUT
connected to GND –18 mA
I
SC
Short-circuit current
(3)
V
OUT
connected to V
DD
20 mA
Signal overrange indication delay
V
IN
= 1-V step, see note
(3)
2.5 to 3.5 µs
(OR pin)
(3)
BW
–3dB
Bandwidth
(3)
2 MHz
SR Slew rate 6.5 V/µs
Settling time large-signal
(3)
ΔV = ± 2 V to 1%, no external filter 0.9 µs
Settling time
(3)
ΔV = ± 0.4 V to 0.01% 8 µs
e
n
Output voltage noise density, RTO
(3)
f = 1 kHz, compensation loop disabled 170 nV/√Hz
(1) Note that the numbers in the brackets correspond to the GSEL number and its value. For example, in this case, GSEL [0,0] means that
GSEL1 = 0 and GSEL2 = 0.
(2) Parameter value referred to output (RTO).
(3) See Typical Characteristic curves.
Copyright © 2013, Texas Instruments Incorporated 3
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