TI-SN74HCT595-Q1.pdf
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SN74HCT595-Q1 Automotive 8-Bit Shift Registers with 3-State Output Registers
1 Features
• AEC-Q100 Qualified for automotive applications:
– Device temperature grade 1:
• –40°C to +125°C, T
A
– Device HBM ESD Classification Level 2
– Device CDM ESD Classifcation Level C6
• LSTTL input logic compatible
– V
IL(max)
= 0.8 V, V
IH(min)
= 2 V
• CMOS input logic compatible
– I
I
≤ 1 µA at V
OL
, V
OH
• 4.5 V to 5.5 V operation
• Supports fanout up to 10 LSTTL loads
• Shift register has direct clear
2 Applications
• Output expansion
• LED matrix control
• 7-segment display control
• 8-bit data storage
3 Description
The SN74HCT595-Q1 device contains an 8-bit, serial-
in, parallel-out shift register that feeds an 8-bit D-type
storage register. The storage register has parallel
3-state outputs. Separate clocks are provided for
both the shift and storage register. The shift register
has a direct overriding clear (SRCLR) input, serial
(SER) input, and a serial output (Q
H'
) for cascading.
When the output-enable (OE) input is high, the
storage register outputs are in a high-impedance
state. Internal register data and serial output (Q
H'
) are
not impacted by the operation of the OE input.
Device Information
(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SN74HCT595PW-Q1 TSSOP (16) 5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
RCLK
OE
SRCLR
SRCLK
SER
13
12
10
11
14
D
R
15
1
Q
A
Q
B
Q
C
Q
D
R
Q
D
Q
D
Q
2
Q
D
3
Q
E
4
Q
F
5
Q
G
6
D
R
7
9
Q
H’
Q
D
Q Q
H
Logic Diagram (Positive Logic)
ADVANCE INFORMATION
SN74HCT595-Q1
SCLS883 – OCTOBER 2021
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. ADVANCE INFORMATION for preproduction products; subject to change
without notice.
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