TI-SN74HCT595.pdf资源-CSDN文库

SN74HCT595 8-Bit Shift Registers with 3-State Output Registers

1 Features

• LSTTL input logic compatible

– V

IL(max)

= 0.8 V, V

IH(min)

= 2 V

• CMOS input logic compatible

– I

I

≤ 1 µA at V

OL

, V

OH

• 4.5 V to 5.5 V operation

• Supports fanout up to 10 LSTTL loads

• Shift register has direct clear

• Extended ambient temperature range: –40°C to

+125°C, T

A

2 Applications

• Output expansion

• LED matrix control

• 7-segment display control

• 8-bit data storage

3 Description

The SN74HCT595 device contains an 8-bit, serial-in,

parallel-out shift register that feeds an 8-bit D-type

storage register. The storage register has parallel

3-state outputs. Separate clocks are provided for

both the shift and storage register. The shift register

has a direct overriding clear (SRCLR) input, serial

(SER) input, and a serial output (Q

H'

) for cascading.

When the output-enable (OE) input is high, the

storage register outputs are in a high-impedance

state. Internal register data and serial output (Q

H'

) are

not impacted by the operation of the OE input.

Device Information

(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

SN74HCT595PW TSSOP (16) 5.00 mm × 4.40 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

RCLK

OE

SRCLR

SRCLK

SER

13

12

10

11

14

D

R

15

1

Q

A

Q

B

Q

C

Q

D

R

Q

D

Q

D

Q

2

Q

D

3

Q

E

4

Q

F

5

Q

G

6

D

R

7

9

Q

H’

Q

D

Q Q

H

Logic Diagram (Positive Logic)

ADVANCE INFORMATION

SN74HCT595

SCLS880 – OCTOBER 2021

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. ADVANCE INFORMATION for preproduction products; subject to change

without notice.

Table of Contents

1 Features............................................................................1

2 Applications..................................................................... 1

3 Description.......................................................................1

4 Revision History.............................................................. 2

5 Pin Configuration and Functions...................................3

6 Specifications.................................................................. 4

6.1 Absolute Maximum Ratings........................................ 4

6.2 ESD Ratings............................................................... 4

6.3 Recommended Operating Conditions.........................4

6.4 Thermal Information....................................................4

6.5 Electrical Characteristics.............................................5

6.6 Timing Characteristics.................................................5

6.7 Switching Characteristics............................................6

6.8 Typical Characteristics................................................ 8

7 Parameter Measurement Information............................ 9

8 Detailed Description......................................................10

8.1 Functional Block Diagram......................................... 10

8.2 Feature Description...................................................10

8.3 Device Functional Modes..........................................12

9 Application and Implementation.................................. 13

9.1 Application Information............................................. 13

9.2 Typical Application.................................................... 14

10 Power Supply Recommendations..............................17

11 Layout........................................................................... 17

11.1 Layout Guidelines................................................... 17

11.2 Layout Example...................................................... 17

12 Device and Documentation Support..........................18

12.1 Documentation Support.......................................... 18

12.2 Receiving Notification of Documentation Updates..18

12.3 Support Resources................................................. 18

12.4 Trademarks............................................................. 18

12.5 Electrostatic Discharge Caution..............................18

12.6 Glossary..................................................................18

13 Mechanical, Packaging, and Orderable

Information.................................................................... 18

13.1 Tape and Reel Information......................................22

4 Revision History

DATE REVISION NOTES

October 2021 * Initial Release

SN74HCT595

SCLS880 – OCTOBER 2021

www.ti.com

ADVANCE INFORMATION

2 Submit Document Feedback

Product Folder Links: SN74HCT595

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN MAX UNIT

V

CC

Supply voltage –0.5 7 V

I

IK

Input clamp current

(2)

V

I

< 0 or V

I

>V

CC

+ 0.5 V –20 20 mA

I

OK

Output clamp current

(2)

V

O

< 0 or V

O

> V

CC

+ 0.5

V

–20 20 mA

I

O

Continuous output current V

O

= 0 to V

CC

–35 35 mA

I

CC

Continuous output current through V

CC

or GND –70 70 mA

T

J

Junction temperature 150 °C

T

stg

Storage temperature –65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress

ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated

under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

(2) The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

6.2 ESD Ratings

VALUE UNIT

V

(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/

JEDEC JS-001

(1)

±4000

V

Charged-device model (CDM), per ANSI/ESDA/

JEDEC JS-002

(2)

±1500

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN NOM MAX UNIT

V

CC

Supply voltage 4.5 5 5.5 V

V

IH

High-level input voltage V

CC

= 4.5 V to 5.5V 2 V

V

IL

Low-level input voltage V

CC

= 4.5 V to 5.5V 0.8 V

V

I

Input voltage 0 V

CC

V

O

Output voltage 0 V

CC

V

Δt/Δv Input transition rise and fall rate V

CC

= 4.5 V to 5.5V 500 ns/V

T

A

Ambient temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC

(1)

SN74HCT595

UNITPW (TSSOP)

16 PINS

R

θJA

Junction-to-ambient thermal resistance 131.8 °C/W

R

θJC(top)

Junction-to-case (top) thermal resistance 69.8 °C/W

R

θJB

Junction-to-board thermal resistance 76.5 °C/W

Ψ

JT

Junction-to-top characterization parameter 20.9 °C/W

Y

JB

Junction-to-board characterization parameter 76.1 °C/W

SN74HCT595

SCLS880 – OCTOBER 2021

www.ti.com

ADVANCE INFORMATION

4 Submit Document Feedback

Product Folder Links: SN74HCT595

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