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TI-SN74HCT165.pdf
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TI-SN74HCT165.pdf
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SN74HCT165 8-Bit Parallel-Load Shift Registers
1 Features
• LSTTL input logic compatible
– V
IL(max)
= 0.8 V, V
IH(min)
= 2 V
• CMOS input logic compatible
– I
I
≤ 1 µA at V
OL
, V
OH
• 4.5 V to 5.5 V operation
• Supports fanout up to 10 LSTTL loads
• Direct Overriding Load (Data) Inputs
• Gated Clock Inputs
• Extended ambient temperature range: –40°C to
+125°C, T
A
2 Applications
• Increase the Number of Inputs on a Microcontroller
3 Description
The SN74HCT165 is a parallel- or serial-in, serial-out
8-bit shift register. Parallel-in access to each stage is
provided by eight individual direct data (A-H) inputs
that are enabled by a low level at the shift/load
(SH/LD) input. The SN74HCT165 also features a
clock-inhibit (CLK INH) function and a complementary
serial (Q
H
) output.
Device Information
PART NUMBER PACKAGE
(1)
BODY SIZE (NOM)
SN74HCT165PW TSSOP (16) 5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
SH/LD
SER
CLK INH
CLK
A
D
S R
Q
B
D
S R
Q
5 Additional
Shift Register
Stages
C D E F G
H
D
S R
Q
Q
Q
H
Q
H
Positive Logic Diagram
ADVANCE INFORMATION
SN74HCT165
SCLS881 – OCTOBER 2021
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. ADVANCE INFORMATION for preproduction products; subject to change
without notice.
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 Timing Characteristics.................................................5
6.7 Switching Characteristics............................................6
6.8 Typical Characteristics................................................ 7
7 Parameter Measurement Information............................ 8
8 Detailed Description........................................................9
8.1 Overview..................................................................... 9
8.2 Functional Block Diagram........................................... 9
8.3 Feature Description.....................................................9
8.4 Device Functional Modes..........................................11
9 Application and Implementation.................................. 12
9.1 Application Information............................................. 12
9.2 Typical Application.................................................... 12
10 Power Supply Recommendations..............................15
11 Layout........................................................................... 15
11.1 Layout Guidelines................................................... 15
11.2 Layout Example...................................................... 15
12 Device and Documentation Support..........................16
12.1 Documentation Support.......................................... 16
12.2 Receiving Notification of Documentation Updates..16
12.3 Support Resources................................................. 16
12.4 Trademarks............................................................. 16
12.5 Electrostatic Discharge Caution..............................16
12.6 Glossary..................................................................16
13 Mechanical, Packaging, and Orderable
Information.................................................................... 16
13.1 Tape and Reel Information......................................20
4 Revision History
DATE REVISION NOTES
October 2021 * Initial Release
SN74HCT165
SCLS881 – OCTOBER 2021
www.ti.com
ADVANCE INFORMATION
2 Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: SN74HCT165
5 Pin Configuration and Functions
1
2
3
7
4
5
6
14
13
12
8
11
10
9
GND
D
B
A
V
CC
15
16
CLK
E
F
G
H
Q
H
CLK INH
C
SER
Q
H
SH/LD
PW Package
16-Pin TSSOP
Top View
Table 5-1. Pin Functions
PIN
I/O DESCRIPTION
NAME NO.
SH/LD 1 I Enable shifting when input is high, load data when input is low
CLK 2 I Clock, rising edge triggered
E 3 I Parallel input E
F 4 I Parallel input F
G 5 I Parallel input G
H 6 I Parallel input H
Q
H
7 O Inverted serial output
GND 8 — Ground
Q
H
9 O Serial output
SER 10 I Serial input
A 11 I Parallel input A
B 12 I Parallel input B
C 13 I Parallel input C
D 14 I Parallel input D
CLK INH 15 I Clock inhibit input
V
CC
16 — Positive supply
www.ti.com
SN74HCT165
SCLS881 – OCTOBER 2021
ADVANCE INFORMATION
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
3
Product Folder Links: SN74HCT165
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN MAX UNIT
V
CC
Supply voltage –0.5 7 V
I
IK
Input clamp current
(2)
V
I
< 0 or V
I
> V
CC
+ 0.5 V –20 20 mA
I
OK
Output clamp current
(2)
V
O
< 0 or V
O
> V
CC
+ 0.5
V
–20 20 mA
I
O
Continuous output current V
O
= 0 to V
CC
–35 35 mA
I
CC
Continuous output current through V
CC
or GND –70 70 mA
T
J
Junction temperature 150 °C
T
stg
Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated
under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
6.2 ESD Ratings
VALUE UNIT
V
(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/
JEDEC JS-001
(1)
±4000
V
Charged-device model (CDM), per ANSI/ESDA/
JEDEC JS-002
(2)
±1500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
V
CC
Supply voltage 4.5 5 5.5 V
V
IH
High-level input voltage V
CC
= 4.5 V to 5.5V 2 V
V
IL
Low-level input voltage V
CC
= 4.5 V to 5.5V 0.8 V
V
I
Input voltage 0 V
CC
V
V
O
Output voltage 0 V
CC
V
Δt/Δv Input transition rise and fall rate V
CC
= 4.5 V to 5.5V 500 ns/V
T
A
Ambient temperature –40 125 °C
6.4 Thermal Information
THERMAL METRIC
(1)
SN74HCT165
UNITPW (TSSOP)
16 PINS
R
θJA
Junction-to-ambient thermal resistance 131.8 °C/W
R
θJC(top)
Junction-to-case (top) thermal resistance 69.8 °C/W
R
θJB
Junction-to-board thermal resistance 76.5 °C/W
Ψ
JT
Junction-to-top characterization parameter 20.9 °C/W
Y
JB
Junction-to-board characterization parameter 76.1 °C/W
SN74HCT165
SCLS881 – OCTOBER 2021
www.ti.com
ADVANCE INFORMATION
4 Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: SN74HCT165
6.4 Thermal Information (continued)
THERMAL METRIC
(1)
SN74HCT165
UNITPW (TSSOP)
16 PINS
R
θJC(bot)
Junction-to-case (bottom) thermal resistance N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS
T
A
= 25°C -40°C to 125°C
UNIT
MIN TYP MAX MIN TYP MAX
V
OH
High-level output voltage V
I
= V
IH
or V
IL
I
OH
= -20 uA, V
CC
=
4.5 V
4.4 4.4 V
I
OH
= -6 mA, V
CC
=
4.5 V
3.98 3.84 V
I
OH
= -4 mA, V
CC
=
4.5 V
3.98 3.84 V
V
OL
Low-level output voltage V
I
= V
IH
or V
IL
I
OL
= 20 uA, V
CC
=
4.5 V
0.1 0.1 V
I
OL
= 4 mA, V
CC
=
4.5 V
0.26 0.33 V
I
OL
= 6 mA, V
CC
=
4.5 V
0.26 0.33 V
I
I
Input leakage current V
I
= V
CC
or 0 V
CC
= 5.5 V ±100
±100
0
nA
I
OZ
Off-State (High-Impedance State) Output
Current
V
O
= V
CC
or 0, Q
A
-
Q
H
V
CC
= 5.5 V ±0.5 ±5 µA
I
CC
Supply current V
I
= V
CC
or 0, I
O
= 0 V
CC
= 5.5 V 8 80 µA
ΔI
CC
Additional Quiescent Device Current Per
Input Pin
V
I
= V
CC
- 2.1V V
CC
= 4.5V to 5.5V
126.
2
157.
5
µA
V
I
= 0.5 V or 2.4V V
CC
= 5.5V 2.4 2.9 mA
C
i
Input capacitance V
CC
= 4.5V to 5.5V V
CC
= 4.5V to 5.5V 10 pF
C
O
Output capacitance V
CC
= 4.5V to 5.5V V
CC
= 4.5V to 5.5V 20 pF
C
pd
Power dissipation capacitance per gate No load 50 pF
6.6 Timing Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER CONDITION V
CC
T
A
= 25°C -40°C to 125°C
UNIT
MIN MAX MIN MAX
f
clock
Clock frequency 4.5 V 31 25 MHz
t
w
Pulse duration
SH/LD low
4.5 V 20 25
ns
5.5 V 20 25
CLK high or low
4.5 V 18 23
5.5 V 18 23
www.ti.com
SN74HCT165
SCLS881 – OCTOBER 2021
ADVANCE INFORMATION
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
5
Product Folder Links: SN74HCT165
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