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具有有源整流和负载突降保护功能的 LM7481-Q1 理想二极管控制器
1 特性
• 符合面向汽车应用的 AEC-Q100 标准
– 器件温度等级 1:
–40°C 至 +125°C 环境工作温度范围
– 器件 HBM ESD 分类等级 2
– 器件 CDM ESD 分类等级 C4B
• 3V 至 65V 输入范围
• 反向输入保护低至 –65V
• 驱动外部背对背 N 沟道 MOSFET
• 9.1mV 阳极至阴极正向压降调节下,理想二极管正
常运行
• 低反向检测阈值 (–4mV),能够快速响应 (0.5µs)
• 高达 200KHz 的有源整流
• 60mA 峰值栅极 (DGATE) 导通电流
• 2.6A 峰值 DGATE 关断电流
• 集成 3.8mA 电荷泵
• 可调节过压保护
• 2.87µA 低关断电流(EN/UVLO = 低电平)
• 2.6A 峰值 DGATE 关断电流
• 采用合适的 TVS 二极管,符合汽车 ISO7637 瞬态
要求
• 采用节省空间的 12 引脚 WSON 封装
2 应用
• 汽车电池保护
– ADAS 域控制器
– 音响主机
– 高端音响
• 用于冗余电源的有源 ORing
3 说明
LM74810-Q1 理想二极管控制器可驱动和控制外部背
对背 N 沟道 MOSFET,从而模拟具有电源路径开/关控
制和过压保护的理想二极管整流器。3V 至 65V 的宽输
入电源电压可保护和控制 12V 和 24V 汽车类电池供电
的 ECU。该器件可以承受并保护负载免受低至 –65V
的负电源电压的影响。集成的理想二极管控制器
(DGATE) 可驱动第一个 MOSFET 来代替肖特基二极
管,以实现反向输入保护和输出电压保持。具有 60mA
峰值栅极拉电流驱动器级以及短导通和关断延迟时间的
3.8mA 强电荷泵可确保快速的瞬态响应,从而确保在
汽车测试(如 ISO16750 或 LV124)期间实现稳健、
高效的 MOSFET 开关性能,在汽车测试中 ECU 会收
到输入短时中断以及频率高达 200KHz 的交流叠加输
入信号。在电源路径中使用了第二个 MOSFET 的情况
下,该器件允许负载断开(开/关控制)并使用 HGATE
控制提供过压保护。该器件具有可调节过压切断保护功
能,以提供负载突降保护。
器件信息
(1)
器件型号 封装
封装尺寸(标称值)
LM74810-Q1 WSON (12) 3.0mm x 3.0mm
(1) 如需了解所有可用封装,请参阅数据表末尾的可订购产品附
录。
GND
DGATE
A
HGATE
OUT
C
EN/UVLO
VBATT
12 V
VOUT1
(VBATT Switched)
VOUT2
(Always ON)
CAP
VS
ON
OFF
Q1
Q2
D1
SMBJ36CA
SW
R
2
R
1
OV
VSNS
R
3
BATT_MON
LM74810-Q1
具有开关输出的理想二极管
ISO16750、LV124 交流叠加性能
www.ti.com.cn
LM7481-Q1
ZHCSLA3A – MAY 2020 – REVISED DECEMBER 2020
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
1
Product Folder Links: LM7481-Q1
LM7481-Q1
ZHCSLA3A – MAY 2020 – REVISED DECEMBER 2020
本文档旨在为方便起见,提供有关 TI 产品中文版本的信息,以确认产品的概要。有关适用的官方英文版本的最新信息,请访问
www.ti.com,其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SNOSD98
Table of Contents
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings ....................................... 4
6.2 ESD Ratings .............................................................. 4
6.3 Recommended Operating Conditions ........................4
6.4 Thermal Information ...................................................5
6.5 Electrical Characteristics ............................................5
6.6 Switching Characteristics ...........................................6
6.7 Typical Characteristics................................................ 8
7 Parameter Measurement Information.......................... 11
8 Detailed Description......................................................12
8.1 Overview................................................................... 12
8.2 Functional Block Diagram......................................... 12
8.3 Feature Description...................................................13
8.4 Device Functional Modes..........................................16
8.5 Application Examples................................................17
9 Application and Implementation.................................. 18
9.1 Application Information............................................. 18
9.2 Typical 12-V Reverse Battery Protection
Application...................................................................18
9.3 Do's and Don'ts.........................................................26
10 Power Supply Recommendations..............................27
10.1 Transient Protection................................................27
10.2 TVS Selection for 12-V Battery Systems................ 28
10.3 TVS Selection for 24-V Battery Systems................ 28
11 Layout...........................................................................29
11.1 Layout Guidelines................................................... 29
11.2 Layout Example...................................................... 29
12 Device and Documentation Support..........................30
12.1 Receiving Notification of Documentation Updates..30
12.2 Support Resources................................................. 30
12.3 Trademarks.............................................................30
12.4 Electrostatic Discharge Caution..............................30
12.5 Glossary..................................................................30
13 Mechanical, Packaging, and Orderable
Information.................................................................... 30
4 Revision History
注:以前版本的页码可能与当前版本的页码不同
Changes from Revision * (May 2020) to Revision A (December 2020) Page
• 更新了整个文档的表、图和交叉参考的编号格式................................................................................................ 1
• 将状态从“预告信息”更改为“量产数据”....................................................................................................... 1
LM7481-Q1
ZHCSLA3A – MAY 2020 – REVISED DECEMBER 2020
www.ti.com.cn
2
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Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: LM7481-Q1
5 Pin Configuration and Functions
11
10
9
8
7
2
3
4
5
6
C
DGATE
A
OV
VSNS
SW
GND
OUT
CAP
RTN
1
12
HGATE
EN/UVLO
VS
Exposed
Thermal
Pad
图 5-1. 12-Pin WSON Top View
表 5-1. Pin Functions
PIN
TYPE DESCRIPTION
NAME
LM74810-Q1
WSON
DGATE 1 O
Diode Controller Gate Drive Output. Connect to the GATE of the external
MOSFET. Anode of the ideal diode.
A 2 I Anode of the ideal diode. Connect to the source of the external MOSFET
VSNS 3 I Voltage sensing input.
SW 4 I
Voltage sensing disconnect switch terminal. VSNS and SW are internally
connected through a switch. Use SW as the top connection of the battery
sensing or OV resistor ladder network. When EN/UVLO is pulled low, the switch
is OFF disconnecting the resistor ladder from the battery line thereby cutting off
the leakage current. If the internal disconnect switch between VSNS and SW is
not used then short them together and connect to VS pin.
OV 5 I
Adjustable over voltage threshold input. Connect a resistor ladder across SW to
OV terminal. When the voltage at OVP exceeds the over voltage cut-off
threshold then the HGATE is pulled low turning OFF the HSFET. HGATE turns
ON when the sense voltage goes below the OVP falling threshold.
EN/UVLO 6 I
EN/UVLO Input. Connect to VS pin for always ON operation. Can be driven
externally from a mirco controller I/O. Pulling it low below V
(ENF)
makes the
device enter into low Iq shutdown mode. For UVLO, connect an external resistor
ladder to EN/UVLO to GND.
GND
7 G Connect to the system ground plane.
HGATE 8 O GATE driver output for the HSFET. Connect to the GATE of the external FET
OUT 9 I Connect to the output rail (external MOSFET source).
VS 10 I
Input power supply to the IC. Connect VS to middle point of the common drain
back to back MOSFET configuration. Connect a 100nF capacitor across VS and
GND pins.
CAP
11 O Charge pump output. Connect a 100-nF capacitor across CAP and VS pins.
C 12 I Cathode of the ideal diode. Connect to the drain of the external MOSFET
RTN Thermal Pad
—
Leave exposed pad floating. Do not connect to GND plane.
www.ti.com.cn
LM7481-Q1
ZHCSLA3A – MAY 2020 – REVISED DECEMBER 2020
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
3
Product Folder Links: LM7481-Q1
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN MAX UNIT
Input Pins
A to GND
–65
70
V
VS to GND
–1
70
VSNS, SW, EN/UVLO, C, OV, OUT to GND, V
(A)
> 0 V
–0.3
70
VSNS, SW, EN/UVLO, C, OV, OUT to GND, V
(A)
≤ 0 V
V
(A)
(70 + V
(A)
)
RTN to GND
–65
0.3
I
VSNS
, I
SW
–1
10 mA
I
EN/UVLO
, I
OV,
V
(A)
> 0 V
–1
mA
I
EN/UVLO
, I
OV,
V
(A)
≤ 0 V
Internally limited
Output Pins OUT to VS
–65
16.5 V
Output Pins
CAP to VS
–0.3
15
V
CAP to A
–0.3
85
DGATE to A
–0.3
15
HGATE to OUT
–0.3
15
Output to Input Pins C to A
–5
85
Operating junction temperature, T
j
(2)
–40
150
°C
Storage temperature, T
stg
–40
150
(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.
6.2 ESD Ratings
VALUE
UNIT
V
(ESD)
Electrostatic discharge
Human body model (HBM), per AEC Q100-002
(1)
±2000
V
Charged device model (CDM), per
AEC Q100-011
Corner pins (DGATE, OV, and C) ±750
Other pins ±500
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
(1)
MIN NOM MAX UNIT
Input Pins
A to GND
–60
65 V
VS to GND 0 65 V
EN/UVLO to GND 0 65 V
External
Capacitanc
e
CAP to A, VS to GND, A to GND 0.1 µF
External
MOSFET
max VGS
rating
DGATE to A and HGATE to OUT 15 V
LM7481-Q1
ZHCSLA3A – MAY 2020 – REVISED DECEMBER 2020
www.ti.com.cn
4
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Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: LM7481-Q1
6.3 Recommended Operating Conditions (continued)
over operating free-air temperature range (unless otherwise noted)
(1)
MIN NOM MAX UNIT
Tj Operating Junction temperature
(2)
–40
150 °C
(1) Recommended Operating Conditions are conditions under which the device is intended to be functional. For specifications and test
conditions, see Electrical Characteristics.
(2) High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.
6.4 Thermal Information
THERMAL METRIC
(1)
LM74810-Q1
UNITDRR (WSON)
12 PINS
R
θJA
Junction-to-ambient thermal resistance 60.9 °C/W
R
θJC(top)
Junction-to-case (top) thermal resistance 48 °C/W
R
θJB
Junction-to-board thermal resistance 31.5 °C/W
Ψ
JT
Junction-to-top characterization parameter 1.2 °C/W
Ψ
JB
Junction-to-board characterization parameter 31.4 °C/W
R
θJC(bot)
Junction-to-case (bottom) thermal resistance 7.1 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Electrical Characteristics
T
J
= –40°C to +125°C; typical values at T
J
= 25°C, V
(A)
= V
(OUT)
= V
(VS)
= V
(VSNS)
= 12 V, V
(AC)
= 20 mV, C
(VCAP)
= 0.1 µF,
V
(EN/UVLO)
= 2 V, over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE
V
(VS)
Operating input voltage 3 65 V
V
(VS_PORR)
VS POR threshold, rising 2.4 2.6 2.85 V
V
(VS_PORF)
VS POR threshold, falling 1.9 2.1 2.3 V
I
(SHDN)
SHDN current, I
(GND)
V
(EN/UVLO)
= 0 V 2.87 5 µA
I
(Q)
Total System Quiescent current, I
(GND)
V
(EN/UVLO)
= 2 V 396 µA
V
(A)
= V
(VS)
= 24 V, V
(EN/UVLO)
= 2 V 408 480 µA
I
(REV)
I
(A)
leakage current during Reverse
Polarity,
0 V ≤ V
(A)
≤ – 65 V
19 112 µA
I
(OUT)
leakage current during Reverse
Polarity
1 µA
ENABLE AND UNDERVOLTAGE LOCKOUT (EN/UVLO) INPUT
V
(UVLOR)
EN/UVLO threshold voltage, rising 1.195 1.231 1.267 V
V
(UVLOF)
EN/UVLO threshold voltage, falling 1.091 1.132 1.159 V
V
(ENF)
Enable threshold voltage for low Iq
shutdown, falling
0.3 0.67 0.93 V
V
(EN_Hys)
Enable Hysteresis 37 72 95 mV
I
(EN/UVLO)
0 V ≤ V
(EN/UVLO)
≤ 65 V
52 200 nA
OVER VOLTAGE PROTECTION AND BATTERY SENSING (VSNS, SW, OV) INPUT
R
(SW)
Battery sensing disconnect switch
resistance
3 V ≤ V
(SNS)
≤ 65 V
10 19.5 46
Ω
V
(OVR)
Overvoltage threshold input, rising 1.195 1.231 1.267 V
V
(OVF)
Overvoltage threshold input, falling 1.091 1.13 1.159 V
www.ti.com.cn
LM7481-Q1
ZHCSLA3A – MAY 2020 – REVISED DECEMBER 2020
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
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Product Folder Links: LM7481-Q1
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