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VCC

CSN

TPS92515

IADJ

PWM

COFF

GND

56 DRN

VIN

BOOT

OUT

PAD

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

English Data Sheet: SLUSBZ6

TPS92515

TPS92515-Q1

TPS92515HV

TPS92515HV-Q1

ZHCSFD3A –APRIL 2016–REVISED AUGUST 2016

TPS92515x 集集成成有有 N 沟沟道道 FET、、

高高侧侧电电流流感感测测和和分分流流 FET PWM 调调光光功功能能的的 2A 降降压压 LED 驱驱动动器器

1 特特性性

• 符合 AEC-Q100 1 级标准

• 集成 290mΩ（典型值）内部 N 沟道场效应晶体管

(FET)

• 输入电压范围：

– TPS92515x：5.5V 至 42V

– TPS92515HVx：5.5V 至 65V

– 启动后工作电压低至 5.15V

• 低偏移高侧峰值电流比较器

• 高达 2A 的恒定平均电流

• 固有逐周期电流限制

• 多种调光方法

– 10,000:1 分流脉宽调制 (PWM) 调光范围

– 1000:1 PWM 调光范围

– 200:1 模拟调光范围

• 简单的恒定关断时间控制

– 无环路补偿

– 快速瞬态响应

• 散热增强型 HVSSOP 封装

• 集成热保护

2 应应用用

• 汽车照明：LED 开关矩阵 AFS 头灯，DRL，远光

灯/近光灯，雾灯，尾灯，转向信号灯，轮廓灯，售

后市场

• 工业照明：工厂自动化、飞行时间 (TOF)、电器、

零售照明、机器视觉检测、紧急出口和/或安全照

明、医用照明、舞台和场地照明

• 农业、航海和重工业照明

• 高对比度分流 FET 调光

3 说说明明

TPS92515 系列器件是集成了低电阻 N 沟道金属氧化

物半导体场效应晶体管 (MOSFET) 的紧凑型单片开关

稳压器。该系列器件适用于注重高效率、高带宽、

PWM 和/或模拟调光以及小尺寸的高亮度 LED 照明应

用。

该稳压器利用恒定关断时间和峰值电流控制功能来运

行。工作原理十分简单：在基于输出电压的一段关断时

间后，即开始导通时间。达到电感峰值电流阈值后，导

通时间立即结束。TPS92515 器件可配置为在分流

FET 调光周期的导通和关断时间内保持恒定的纹波峰

峰值。这非常适合在整个分流 FET 调光范围内保持线

性响应。

稳态精度是在低偏移高侧比较器的支持下得到保证。可

单独使用模拟或 PWM 调光技术来调制 LED 电流，也

可同时使用这两种技术来调制 LED 电流。其他特性

包括欠压闭锁 (UVLO)、宽输入电压操作、固有 LED

开路操作和热关断功能，其工作温度范围较宽。

TPS92515 和 TPS92515-Q1 器件的工作输入电压范

围高达 42V。TPS92515HV 和 TPS92515HV-Q1 提供

输入范围高达 65V 的高电压选项。所有器件均采用散

热增强型 10 引脚 HVSSOP 封装。

器器件件信信息息

(1)

器器件件型型号号封封装装封封装装尺尺寸寸（（标标称称值值））

TPS92515

HVSSOP (10) 3mm x 3mm

TPS92515-Q1

TPS92515HV

TPS92515HV-Q1

(1) 要了解所有可用封装，请参见数据表末尾的可订购产品附录。

简简化化的的降降压压 LED 驱驱动动器器应应用用

TPS92515

TPS92515-Q1

TPS92515HV

TPS92515HV-Q1

ZHCSFD3A –APRIL 2016–REVISED AUGUST 2016

www.ti.com.cn

目目录录

1 特特性性.......................................................................... 1

2 应应用用.......................................................................... 1

3 说说明明.......................................................................... 1

4 修修订订历历史史记记录录 ........................................................... 2

5 Device Comparison Table..................................... 3

6 Pin Configuration and Functions......................... 3

7 Specifications......................................................... 4

7.1 Absolute Maximum Ratings ...................................... 4

7.2 ESD Ratings ............................................................ 4

7.3 Recommended Operating Conditions....................... 4

7.4 Thermal Information................................................. 4

7.5 Electrical Characteristics........................................... 5

7.6 Typical Characteristics.............................................. 7

8 Detailed Description.............................................. 9

8.1 Overview ................................................................... 9

8.2 Functional Block Diagram ......................................... 9

8.3 Feature Description................................................. 10

8.4 Device Functional Modes........................................ 21

9 Application and Implementation ........................ 22

9.1 Application Information............................................ 22

9.2 Typical Application ................................................. 22

9.3 Dos and Don'ts ....................................................... 30

10 Power Supply Recommendations ..................... 31

10.1 Input Source Direct from Battery........................... 31

10.2 Input Source from a Boost Stage ......................... 31

11 Layout................................................................... 31

11.1 Layout Guidelines ................................................. 31

11.2 Layout Example .................................................... 32

12 器器件件和和文文档档支支持持 ..................................................... 33

12.1 文档支持 ............................................................... 33

12.2 接收文档更新通知 ................................................. 33

12.3 社区资源................................................................ 33

12.4 商标 ....................................................................... 33

12.5 静电放电警告......................................................... 33

12.6 Glossary................................................................ 33

13 机机械械、、封封装装和和可可订订购购信信息息....................................... 34

4 修修订订历历史史记记录录

Changes from Original (April 2016) to Revision A Page

• 已将数据表状态由

产品预览

更改为

量产数据

........................................................................................................................... 1

TPS92515

TPS92515-Q1

TPS92515HV

TPS92515HV-Q1

ZHCSFD3A –APRIL 2016–REVISED AUGUST 2016

www.ti.com.cn

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) DRN to SW. Absolute maximum not to be exceeded.

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN MAX UNIT

VIN, DRN, SW, CSN to GND

TPS92515, TPS92515-Q1 –0.3 45.0

TPS92515HV, TPS92515HV-Q1 –0.3 65.0

DRN to SW

TPS92515, TPS92515-Q1 –0.3 45.0

TPS92515HV, TPS92515HV-Q1 –0.3 65.0

BOOT to GND

TPS92515, TPS92515-Q1 –0.3 50.5

TPS92515HV, TPS92515HV-Q1 –0.3 70.5

COFF, IADJ, PWM to GND –0.3 5.5

BOOT to SW –0.3 5.5

VCC to GND -0.3 5.5

VIN to CSN –0.3 0.3

SW to GND, 10-ns transient

(2)

–2.0

Storage temperature, T

stg

-40 150 °C

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

7.2 ESD Ratings

VALUE UNIT

(ESD)

Electrostatic

discharge

Human-body model (HBM), per AEC Q100-002

(1)

±2000

Charged-device model (CDM), per AEC Q100-011 ±750

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN NOM MAX UNIT

Input voltage

TPS92515, TPS92515-Q1 5.5 42

TPS92515HV, TPS92515HV-Q1 5.5 65

Operating ambient temperature 125 °C

Operating junction temperature 150 °C

(1) For more information about traditional and new thermal metrics, see the Semiconductor and device Package Thermal Metrics

application report, SPRA953.

7.4 Thermal Information

THERMAL METRIC

(1)

TPS92515

UNITHVSSOP

10 PINS

θJA

Junction-to-ambient thermal resistance 56.2 °C/W

θJC(top)

Junction-to-case (top) thermal resistance 44.7 °C/W

θJB

Junction-to-board thermal resistance 32.1 °C/W

Junction-to-top characterization parameter 1.5 °C/W

Junction-to-board characterization parameter 31.8 °C/W

θJC(bot)

Junction-to-case (bottom) thermal resistance 5.3 °C/W

TPS92515

TPS92515-Q1

TPS92515HV

TPS92515HV-Q1

www.ti.com.cn

ZHCSFD3A –APRIL 2016–REVISED AUGUST 2016

7.5 Electrical Characteristics

= 40 V, –40°C ≤ T

≤ 150°C, V

BOOT

is referenced to SW pin, unless otherwise specified.

PARAMETER TEST CONDITION MIN TYP MAX UNIT

PEAK CURRENT COMPARATOR

CST

– V

CSN

peak current threshold

IADJ

= VCC 224 240 251 mV

IADJ

= 2.2 V 211.5 220 223.5 mV

ADJ

IADJ

to V

– V

CSN

threshold gain 0.1 ≤ V

IADJ

≤ 2.2 V 0.1 V/V

CSN

Current sense pin, input bias

current

–5 0 µA

DEL

CSN pin falling delay CSN fall to SW fall 75 130 ns

LEB

Minimum ON-time Minimum pulse width 75 195 275 ns

SYSTEM CURRENTS

Operating current Not switching, V

IADJ

= V

VCC

0.85 1.5 mA

INTEGRATED N-Channel MOSFET AND DRIVER

DS(on)

FET ON-resistance

DRN-SW

= 200mA, V

BOOT

= 5 V,

= 25°C

290 500

mΩ

DRN-SW

= 200mA, V

BOOT

= 5 V,

= 150°C

290 600

DRN-SW

= 200mA, V

BOOT

= 3.5 V,

= 25°C

310 500

DRN-SW

= 200mA, V

BOOT

= 3.5 V,

= 150°C

310 650

DRN-SW(off)

FET leakage current V

DRN-SW

= 6 V, V

= 0 V 10 µA

BOOT-UVLO

Voltage where gate drive is

disabled

BOOT

falling 2.0 2.8 3.5 V

BOOT-UVLO(hys)

BOOT pin UVLO Hysteresis 125 mV

PD(PWM/UVLO)

Pull down from SW when PWM

low.

PWM low, V

BOOT

= 5 V , V

= 8 V 100 130 µA

PD(BOOT)

Pull down from SW when V

BOOT

reaches V

BOOT-UVLO

PWM high, V

BOOT

< BOOT-UVLO, V

= 8 V

5 7 mA

BOOT_Q

BOOT pin quiescent current V

BOOT

= 5.5 V, 0 V ≤ V

≤ 65 V 60 90 µA

VCC/REFERENCE REGULATOR

VCC Regulated pin voltage I

VCC(ext)

≤ 500 µA 4.8 5.0 5.2 V

VCC

Drop out voltage I

VCC(ext)

≤ 500 µA 0.1 0.2 V

VCC

UVLO

VCC undervoltage lockout Falling threshold, V

= 10 V 4.0 4.2 4.4 V

VCC

UVLO_hys

VCC undervoltage lockout

hysteresis

0.22 V

VCC(ILIM)

VCC regulator current limit VCC shorted to GND 14 19 23 mA

VIN

UVLO

VIN UVLO Falling Threshold 4.65 4.90 5.15 V

VIN

UVLO_hys

VIN UVLO Hysteresis 150 190 225 mV

OFF-TIMER

OFT

OFF-time threshold 0.95 1.00 1.05 V

D(off)

OFF

threshold C

OFF

to SW rising delay 68 120 ns

OFF(max)

Maximum OFF-time 230 µs

PWM/UVLO (Enable)

PWM(uvlo)

PWM/UVLO pin current V

PWM(uvlo)

= 5.5 V 10 nA

PWM(uvlo)

PWM/UVLO pin threshold PWM pin rising 0.95 1.0 1.05 V

PWM(uvlo-hys)

PWM/UVLO pin hysteresis

Difference between rising and falling

threshold

50 100 150 mV

PWM(uvlo)

PWM/UVLO pin delay

PWM pin rising to SW pin rising 75 130 ns

PWM pin falling to SW pin falling 100 170 ns

PWM(uvlo-hys)

PWM/UVLO hysteresis current V

PWM(uvlo)

= 2 V –25 –20 –15 μA

剩余40页未读，继续阅读

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