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TI-TPS2110A.pdf
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TI-TPS2110A.pdf
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TPS2110A/TPS2111A
D0
D1
VSNS
ILIM
IN1
OUT
IN2
GND
8
7
6
5
1
2
3
4
R
L
R
ILIM
C
L
C
2
0.1 Fm
C
1
0.1 Fm
EN1
IN2:2.8Vto5.5V
IN1:2.8Vto5.5V
TPS2110A
TPS2111A
www.ti.com
SBVS043A –MARCH 2004–REVISED MARCH 2010
AUTOSWITCHING POWER MUX
Check for Samples: TPS2110A, TPS2111A
1
FEATURES
APPLICATIONS
• PCs
2
• Two-Input, One-Output Power Multiplexer with
Low r
DS(on)
Switches:
• PDAs
• Digital Cameras
– 84 mΩ Typ (TPS2111A)
• Modems
– 120 mΩ Typ (TPS2110A)
• Cell Phones
• Reverse and Cross-Conduction Blocking
• Digital Radios
• Wide Operating Voltage Range: 2.8 V to 5.5 V
• MP3 Players
• Low Standby Current: 0.5 mA Typ
• Low Operating Current: 55 mA Typ
DESCRIPTION
• Adjustable Current Limit
The TPS211xA family of power multiplexers enables
• Controlled Output Voltage Transition Time:
seamless transition between two power supplies,
Limits Inrush Current
such as a battery and a wall adapter, each operating
Minimizes Output Voltage Hold-Up
at 2.8 V to 5.5 V and delivering up to 1 A. The
Capacitance
TPS211xA family includes extensive protection
circuitry, including user-programmable current
• CMOS- and TTL-Compatible Control Inputs
limiting, thermal protection, inrush current control,
• Manual and Auto-Switching Operating Modes
seamless supply transition, cross-conduction
• Thermal Shutdown
blocking, and reverse-conduction blocking. These
features greatly simplify designing power multiplexer
• Available in a TSSOP-8 Package
applications.
space
space
space
space
TYPICAL APPLICATION
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004–2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPS2110A
TPS2111A
SBVS043A –MARCH 2004–REVISED MARCH 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
AVAILABLE OPTIONS
FEATURE TPS2110A TPS2111A TPS2112A TPS2113A TPS2114A TPS2115A
0.31 A to 0.63 A to 0.31 A to 0.63 A to 0.31 A to 0.63 A to
Current Limit Adjustment Range
0.75 A 1.25 A 0.75 A 1.25 A 0.75 A 1.25 A
Manual Yes Yes No No Yes Yes
Switching Modes
Automatic Yes Yes Yes Yes Yes Yes
Switch Status Output No No Yes Yes Yes Yes
ORDERING INFORMATION
(1)
T
A
PACKAGE ORDERING NUMBER PACKAGE MARKING
TPS2110APW 2110A
−40°C to 85°C TSSOP-8 (PW)
TPS2111APW 2111A
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
(1)
Over recommended operating junction temperature range, unless otherwise noted.
TPS2110A, TPS2111A UNIT
Input voltage range at pins IN1, IN2, D0, D1, VSNS, ILIM
(2)
−0.3 to 6 V
Output voltage range, V
O(OUT)
(2)
−0.3 to 6 V
TPS2110A 0.9
Continuous output current, I
O
A
TPS2111A 1.5
Continuous total power dissipation See Dissipation Ratings table
Operating virtual junction temperature range, T
J
Internally Limited
Human body model (HBM) 2 kV
ESD
Charged device model (CDM) 500 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND.
DISSIPATION RATINGS
DERATING FACTOR T
A
≤ 25°C POWER T
A
= 70°C POWER T
A
= 85°C POWER
PACKAGE ABOVE T
A
= 25°C RATING RATING RATING
TSSOP-8 (PW) 3.9 mW/°C 387 mW 213 mW 155 mW
2 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS2110A TPS2111A
TPS2110A
TPS2111A
www.ti.com
SBVS043A –MARCH 2004–REVISED MARCH 2010
RECOMMENDED OPERATING CONDITIONS
TPS2110A, TPS2111A
MIN NOM MAX UNIT
V
I(IN2)
≥ 2.8 V 1.5 5.5
Input voltage at IN1, V
I(IN1)
V
V
I(IN2)
< 2.8 V 2.8 5.5
V
I(IN1)
≥ 2.8 V 1.5 5.5
Input voltage at IN2, V
I(IN2)
V
V
I(IN1)
< 2.8 V 2.8 5.5
Input voltage: V
I(DO)
, V
I(D1)
, V
I(VSNS)
0 5.5 V
TPS2110A 0.31 0.75
Current limit adjustment range, I
O(OUT)
A
TPS2111A 0.63 1.25
Operating virtual junction temperature, T
J
–40 125 °C
ELECTRICAL CHARACTERISTICS: Power Switch
Over recommended operating junction temperature, V
I(IN1)
= V
I(IN2)
= 5.5 V, and R
ILIM
= 400 Ω, unless otherwise noted.
TPS2110A TPS2111A
PARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNIT
V
I(IN1)
= V
I(IN2)
= 5.0 V 120 140 84 110
T
J
= 25°C,
V
I(IN1)
= V
I(IN2)
= 3.3 V 120 140 84 110 mΩ
I
L
= 500 mA
Drain-source
V
I(IN1)
= V
I(IN2)
= 2.8 V 120 140 84 110
on-state
r
DS(on)
(1)
resistance
V
I(IN1)
= V
I(IN2)
= 5.0 V 220 150
(INx−OUT)
T
J
= 125°C,
V
I(IN1)
= V
I(IN2)
= 3.3 V 220 150 mΩ
I
L
= 500 mA
V
I(IN1)
= V
I(IN2)
= 2.8 V 220 150
(1) The TPS211xA can switch a voltage as low as 1.5 V as long as there is a minimum of 2.8 V at one of the input power pins. In this
specific case, the lower supply voltage has no effect on the IN1 and IN2 switch on-resistances.
ELECTRICAL CHARACTERISTICS
Over recommended operating junction temperature, V
I(IN1)
= V
I(IN2)
= 5.5 V, I
O(OUT)
= 0 A, and R
ILIM
= 400 Ω, unless otherwise
noted.
TPS2110A, TPS2111A
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
LOGIC INPUTS (D0 AND D1)
High-level input voltage V
IH
2 V
Low-level input voltage V
IL
0.7 V
D0 or D1 = High, sink current 1
Input current at D0 or D1 mA
D0 or D1 = Low, source current 0.5 1.4 5
SUPPLY AND LEAKAGE CURRENTS
D1 = High, D0 = Low (IN1 active),
55 90
V
I(IN2)
= 3.3 V
D1 = High, D0 = Low (IN1 active),
1 12
Supply current from IN1 (operating) mA
V
I(IN1)
= 3.3 V
D0 = D1 = Low (IN2 active), V
I(IN2)
= 3.3 V 75
D0 = D1 = Low (IN2 active), V
I(IN1)
= 3.3 V 1
D1 = High, D0 = Low (IN1 active),
1
V
I(IN2)
= 3.3 V
D1 = High, D0 = Low (IN1 active),
75
Supply current from IN2 (operating) mA
V
I(IN1)
= 3.3 V
D0 = D1 = Low (IN2 active), V
I(IN2)
= 3.3 V 1 12
D0 = D1 = Low (IN2 active), V
I(IN1)
= 3.3 V 55 90
Copyright © 2004–2010, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TPS2110A TPS2111A
TPS2110A
TPS2111A
SBVS043A –MARCH 2004–REVISED MARCH 2010
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Over recommended operating junction temperature, V
I(IN1)
= V
I(IN2)
= 5.5 V, I
O(OUT)
= 0 A, and R
ILIM
= 400 Ω, unless otherwise
noted.
TPS2110A, TPS2111A
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY AND LEAKAGE CURRENTS, continued
D0 = D1 = High (inactive), V
I(IN2)
= 3.3 V 0.5 2
Quiescent current from IN1 (standby) mA
D0 = D1 = High (inactive), V
I(IN1)
= 3.3 V 1
D0 = D1 = High (inactive), V
I(IN2)
= 3.3 V 1
Quiescent current from IN2 (standby) mA
D0 = D1 = High (inactive), V
I(IN1)
= 3.3 V 0.5 2
Forward leakage current from IN1 D0 = D1 = High (inactive), IN2 open, V
O(OUT)
0.1 5 mA
(measured from OUT to GND) = 0 V (shorted), T
J
= 25°C
Forward leakage current from IN2 D0 = D1 = High (inactive), IN1 open, V
O(OUT)
0.1 5 mA
(measured from OUT to GND) = 0 V (shorted), T
J
= 25°C
Reverse leakage current to INx (measured D0 = D1 = High (inactive), V
I(INx)
= 0 V,
0.3 5 mA
from INx to GND) V
O(OUT)
= 5.5 V, T
J
= 25°C
CURRENT LIMIT CIRCUIT
R
ILIM
= 400 Ω 0.51 0.63 0.80
TPS2110A A
R
ILIM
= 700 Ω 0.30 0.36 0.50
Current limit accuracy
R
ILIM
= 400 Ω 0.95 1.25 1.56
TPS2111A A
R
ILIM
= 700 Ω 0.47 0.71 0.99
Time for short-circuit output current to settle
Current limit settling time t
d
1 ms
within 10% of its steady state value.
Input current at ILIM V
I(ILIM)
= 0 V, I
O(OUT)
= 0 A –15 0 mA
VSNS COMPARATOR
V
I(VSNS)
↑ 0.78 0.80 0.82
VSNS threshold voltage V
V
I(VSNS)
↓ 0.735 0.755 0.775
VSNS comparator hysteresis 30 60 mV
Deglitch of VSNS comparator (both ↑ ↓ ) 90 150 220 ms
Input current 0 V ≤ V
I(VSNS)
≤ 5.5 V –1 1 mA
UVLO
Falling edge 1.15 1.25
IN1 and IN2 UVLO V
Rising edge 1.30 1.35
IN1 and IN2 UVLO hysteresis 30 57 65 mV
Falling edge 2.4 2.53
Internal V
DD
UVLO
V
(the higher of IN1 and IN2)
Rising edge 2.58 2.8
Internal V
DD
UVLO hysteresis 30 50 75 mV
UVLO deglitch for IN1, IN2 Falling edge 110 ms
REVERSE CONDUCTION BLOCKING
D0 = D1 = high, V
I(INx)
= 3.3 V. Connect OUT
Minimum output-to-input
to a 5-V supply through a series 1-kΩ resistor.
voltage difference to block ΔV
O(I_block)
80 100 120 mV
Let D0 = low. Slowly decrease the supply
switching
voltage until OUT connects to IN1.
THERMAL SHUTDOWN
Thermal shutdown threshold TPS211xA is in current limit. 135 °C
Recovery from thermal shutdown TPS211xA is in current limit. 125 °C
Hysteresis 10 °C
IN2−IN1 COMPARATORS
Hysteresis of IN2−IN1 comparator 0.1 0.2 V
Deglitch of IN2−IN1 comparator (both ↑ ↓) 10 20 50 ms
4 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS2110A TPS2111A
TPS2110A
TPS2111A
www.ti.com
SBVS043A –MARCH 2004–REVISED MARCH 2010
SWITCHING CHARACTERISTICS
Over recommended operating junction temperature, V
I(IN1)
= V
I(IN2)
= 5.5 V, and R
ILIM
= 400 Ω, unless otherwise noted.
TPS2110A TPS2111A
PARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNIT
T
J
= 25°C,
Output rise
C
L
= 1 mF,
t
R
time from an V
I(IN1)
= V
I(IN2)
= 5 V 0.5 1.0 1.5 1 1.8 3 ms
I
L
= 500 mA; see
enable
Figure 1(a).
T
J
= 25°C,
Output fall time C
L
= 1 mF,
t
F
V
I(IN1)
= V
I(IN2)
= 5 V 0.35 0.5 0.7 0.5 1 2 ms
from a disable I
L
= 500 mA; see
Figure 1(a).
IN1 to IN2 transition, T
J
= 125°C,
V
I(IN1)
= 3.3 V, C
L
= 10 mF, 40 60 40 60
V
I(IN2)
= 5 V I
L
= 500 mA;
measure transition
t
T
Transition time time as 10% to 90% ms
IN2 to IN1 transition,
rise time or from 3.4
V
I(IN1)
= 5 V, 40 60 40 60
V to 4.8 V on
V
I(IN2)
= 3.3 V
V
O(OUT)
. See
Figure 1(b).
Turn-on V
I(IN1)
= VI
(IN2)
= 5 V T
J
= 25°C,
propagation Measured from C
L
= 10 mF,
t
PLH1
0.5 1 ms
delay from an enable to 10% of I
L
= 500 mA; see
enable V
O(OUT)
Figure 1(a).
Turn-off V
I(IN1)
= VI
(IN2)
= 5 V T
J
= 25°C,
propagation Measured from C
L
= 10 mF,
t
PHL1
3 5 ms
delay from a disable to 90% of I
L
= 500 mA; see
disable V
O(OUT)
Figure 1(a).
Logic 1 to Logic 0
transition on D1,
Switch-over T
J
= 25°C,
V
I(IN1)
= 1.5 V,
rising C
L
= 10 mF,
t
PLH2
V
I(IN2)
= 5 V, 40 100 40 100 ms
propagation I
L
= 500 mA; see
V
I(D0)
= 0 V,
delay Figure 1(c).
Measured from D1 to
10% of V
O(OUT)
Logic 0 to Logic 1
transition on D1,
Switch-over T
J
= 25°C,
V
I(IN1)
= 1.5 V,
falling C
L
= 10 mF,
t
PHL2
V
I(IN2)
= 5 V, 2 3 10 2 5 10 ms
propagation I
L
= 500 mA; see
V
I(D0)
= 0 V,
delay Figure 1(c).
Measured from D1 to
90% of V
O(OUT)
Copyright © 2004–2010, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TPS2110A TPS2111A
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