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TI-TPS2214A.pdf
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TI-TPS2214A.pdf
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SLVS267C − DECEMBER 1999 − REVISED FEBRUARU 2008
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D Provides S−CARD abd M−CARD Power
Management for CableCARD
TM
Applications
D Fully Integrated xVCC and xVPP Switching
D xVPP Programmed Independent of xVCC
D 3.3-V, 5-V, and/or 12-V Power Distribution
D Low r
DS(on)
(60-mΩ 3.3-V xVCC Switch and
140-mΩ 5-V xVCC Switch Typical)
D Short Circuit and Thermal Protection
D 150-µA (Maximum) Quiescent Current
D Standby Mode: 50-mA Current Limit (Typ)
D 12-V Supply Can Be Disabled
D 3.3-V Low-Voltage Mode
D Ambient Temperature ...−40°C to 70°C
D Meets PC Card Standards
D TTL-Logic Compatible Inputs
D Available in 24-Pin and 30-Pin SSOP (DB),
and 32-Pin TSSOP (DAP) Packages
D Break-Before-Make Switching
D Internal Power-On Reset
description
The TPS2214A and TPS2216A PC Card power-interface switches provide an integrated power-management
solution for two PC Cards. All of the discrete power MOSFETs, a logic section, current limiting, and thermal
protection for PC Card control are combined on single integrated circuits. These low-cost devices allow the
distribution of 3.3-V, 5-V, and/or 12-V power to the card. The current-limiting feature eliminates the need for
fuses. Current-limit reporting can help the user isolate a system fault.
The TPS2214A and TPS2216A feature a 3.3-V low-voltage mode that allows for 3.3-V switching without the
need for 5-V power. This feature facilitates low-power system designs such as sleep modes where only 3.3 V
is available. These devices also have the ability to program the xVPP outputs independent of the xVCC outputs.
A standby mode that changes all output-current limits to 50 mA (typical) has been incorporated.
End-equipment applications for these products include: notebook computers, desktop computers, personal
digital assistants (PDAs), digital cameras, and bar-code scanners.
The TPS2216A is backward-compatible with the TPS2202A, TPS2206, and TPS2216. The TPS2214A is
backward-compatible with the TPS2214.
AVAILABLE OPTIONS
PACKAGED DEVICES
†
T
A
PLASTIC SMALL OUTLINE
(DB)
PowerPAD PLASTIC SMALL
OUTLINE
(DAP)
−40°C to 70°C TPS2214ADB(R), TPS2216ADB(R) TPS2216ADAP(R)
†
The DB and DAP packages are available in tubes and left-end taped and reeled. Add R suffix
to device type (e.g., TPS2216ADBR) for taped and reeled.
Copyright 2008, Texas Instruments Incorporated
! "#$ ! %#&'" ($)
(#"! " !%$""! %$ *$ $! $+! !#$!
!(( ,-) (#" %"$!!. ($! $"$!!'- "'#($
$!. '' %$$!)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
5V
5V
DATA
CLOCK
LATCH
RESET
12V
AVPP
AVCC
AVCC
GND
RESET
5V
NC
MODE
NC
12V
BVPP
BVCC
BVCC
STBY
OC
3.3V
3.3V
TPS2214A
DB PACKAGE
(TOP VIEW)
PINOUTS FOR TPS2216A DAP AND DB
PACKAGES ARE PROVIDED ON PAGE 2.
NC − No internal connection
PowerPAD is a trademark of Texas Instruments.
PC Card is a trademark of PCMCIA (Personal Computer Memory Card International Association).
CableCard is a trademark of Cable Television Laboratories, Inc. All other trademarks are the property of their respective owners
SLVS267C − DECEMBER 1999 − REVISED FEBRUARU 2008
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
5V
5V
NC
DATA
CLOCK
LATCH
RESET
12V
AVPP
AVCC
AVCC
AVCC
GND
RESET
NC
3.3V
5V
NC
MODE
NC
NC
NC
NC
12V
BVPP
BVCC
BVCC
BVCC
OC
STBY
3.3V
3.3V
TPS2216A
DAP PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
5V
5V
DATA
CLOCK
LATCH
RESET
12V
AVPP
AVCC
AVCC
AVCC
GND
NC
RESET
3.3V
5V
MODE
NC
NC
NC
NC
12V
BVPP
BVCC
BVCC
BVCC
STBY
OC
3.3V
3.3V
TPS2216A
DB PACKAGE
(TOP VIEW)
NC − No internal connection
Terminal Functions
TERMINAL
NO.
I/O
DESCRIPTION
NAME
TPS2214 TPS2216
I/O
DESCRIPTION
NAME
DB-24 DB-30 DAP
3.3V 13, 14 15, 16, 17 16, 17, 18 I 3.3-V input for card power and/or chip power if 5 V is not present
5V 1, 2, 24 1, 2, 30 1, 2, 32 I 5-V input for card power and/or chip power
12V 7, 20 7, 24 8, 25 I 12-V V
pp
input card power
AVCC 9, 10 9, 10, 11 10, 11, 12 O VCC output: 3.3-V, 5-V, GND or high impedance to card
AVPP 8 8 9 O VPP output: 3.3-V, 5-V, 12-V, GND or high impedance to card
BVCC 17, 18 20, 21, 22 21, 22, 23 O VCC output: 3.3-V, 5-V, GND or high impedance to card
BVPP 19 23 24 O VPP output: 3.3-V, 5-V, 12-V, GND or high impedance to card
GND 11 12 13 Ground
MODE 22 29 30 I TPS2206 operation when floating or pulled low; must be pulled high externally for
TPS2216A operation. MODE is internally pulled low with a 150-kΩ pulldown
resistor.
OC 15 18 20 O Logic-level output that goes low when an overcurrent or overtemperature condition
exists.
RESET 6 6 7 I Logic-level reset input active high. Do not connect if RESET pin is used. RESET
is internally pulled low with a 150-kΩ pulldown resistor.
RESET 12 14 14 I Logic-level reset input active low. Do not connect if RESET pin is used. The pin is
internally pulled high with a 150-kΩ pullup resistor.
STBY 16 19 19 I Logic-level active low input sets the TPS2216 to standby mode and sets all current
limits to 50 mA. The pin is internally pulled high with a 150-kΩ pullup resistor.
CLOCK 4 4 5 I Logic-level clock for serial data word
DATA 3 3 4 I Logic-level serial data word
LATCH 5 5 6 I Logic-level latch for serial data word
NC 21, 23 13, 25, 26,
27, 28
3, 15, 26,
27, 28, 29,
31
No internal connection
SLVS267C − DECEMBER 1999 − REVISED FEBRUARU 2008
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram (pin numbers refer to 30-pin DB package)
†
Both 12V pins must be connected together.
TPS2216A
AVCC
3.3V
15
12V
†
12V
†
5V
5V
5V
3.3V
3.3V
BVPP
BVCC
BVCC
BVCC
AVPP
AVCC
AVCC
16
29
24
7
30
2
1
17
6
5
4
3
19
18
14
9
10
11
8
20
21
22
23
S7
S8
S9
S10
CS
CS
CS
S11
S12
S13
S14
CS
CS
CS
S2
CS
CS
S3
S5
CS
CS
S6
S4
MODE
RESET
LATCH
CLOCK
DATA
STBY
OC
RESET
Internal
Current Monitor
Thermal
GND
12
S1
SLVS267C − DECEMBER 1999 − REVISED FEBRUARU 2008
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating virtual free-air temperature (unless otherwise noted)
†
Input voltage range for card power: V
I(3.3V)
−0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
I(5V)
−0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
I(12V)
−0.3 V to 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic input voltage −0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range: V
O(xVCC)
−0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
O(xVPP)
−0.3 V to 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current: I
O(xVCC)
Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
O(xVPP)
Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, T
J
−40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
−55°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
PACKAGE
T
A
≤ 25°C
POWER RATING
DERATING FACTOR
‡
ABOVE T
A
= 25°C
T
A
= 70°C
POWER RATING
T
A
= 85°C
POWER RATING
DB 1095 mW 10.99 mW/°C 602 mW 438 mW
DAP 4255 mW 42.55 mW/°C 2340 mW 1702 mW
‡
These devices are mounted on an JEDEC low-k board (2 oz. traces on surface), 1-W power applied.
recommended operating conditions
MIN MAX UNIT
V
I(3.3V)
2.7 5.25 V
Input voltage, V
I
V
I(5V)
2.7 5.25 V
Input voltage, V
I
V
I(12V)
2.7 13.5 V
Output current, I
O
I
O(VCC)
at T
A
= 70°C 750 mA
Output current, I
O
I
O(VPP)
at T
A
= 70°C 200 mA
Clock frequency 2.5 MHz
Data 200
Pulse duration
Latch 250
ns
Pulse duration
Clock 100
ns
Data hold time
§
100 ns
Data setup time
§
100 ns
Latch delay time
§
100 ns
Clock delay time
§
250 ns
Operating virtual junction temperature, T
J
−40 100 °C
§
Refer to Figures 2 and 3.
SLVS267C − DECEMBER 1999 − REVISED FEBRUARU 2008
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics, T
J
= 25°C, V
I(5V)
= 5 V, V
I(3.3V)
= 3.3 V, V
I(12V)
= 12 V, STBY floating, all
outputs unloaded (unless otherwise noted)
power switch
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
3.3 V to xVCC, with one or
T
J
= 25°C, V
I(5V)
= 0 or 5, I
O
= 750 mA 60 105
3.3 V to xVCC, with one or
two switches on
T
J
= 85°C, V
I(5V)
= 0 or 5, I
O
= 750 mA 90 140
mΩ
5 V to xVCC, with one or
T
J
= 25°C, I
O
= 750 mA 140 185
m
Ω
5 V to xVCC, with one or
two switches on
T
J
= 85°C, I
O
= 750 mA 160 200
Switch resistance
†
3.3 V/5 V/12 V to xVPP
T
J
= 25°C, I
O
= 50 mA 0.7 1.5
Switch resistance
†
3.3 V/5 V/12 V to xVPP
T
J
= 85°C, I
O
= 50 mA 1.4 2.5
3.3 V/5 V to xVCC
T
J
= 25°C, STBY = low, I
O
= 30 mA 1.4 2
Ω
3.3 V/5 V to xVCC
T
J
= 85°C, STBY = low, I
O
= 30 mA 2 3
Ω
3.3 V/5 V/12 V to xVPP
T
J
= 25°C, STBY = low, I
O
= 30 mA 5 7
3.3 V/5 V/12 V to xVPP
T
J
= 85°C, STBY = low, I
O
= 30 mA 10 16
Clamp low voltage
V
O(xVCC)
I
O(xVCC)
at 10 mA, After reset 0.275 0.8
V
Clamp low voltage
V
O(xVPP)
I
O(xVPP)
at 10 mA, After reset 0.275 0.8
V
I
O(xVCC)
high-impedance
T
J
= 25°C 1 10
I
lkg
Leakage current
I
O(xVCC)
high-impedance
state
T
J
= 85°C 2 50
µA
I
lkg
Leakage current
I
O(xVPP)
high-impedance
T
J
= 25°C 1 10
µ
A
I
O(xVPP)
high-impedance
state
T
J
= 85°C 2 50
I
O(xVCC)
T
J
= 85
°
C,
1 2.5 A
I
Short-circuit output
I
O(xVPP)
T
J
= 85 C,
Output powered into a short to GND
250 500 mA
I
OS
Short-circuit output
current limit
†
Standby mode, I
O(xVCC)
T
J
= 85°C,
Output powered into a short to GND,
35 65
mA
current limit
Standby mode, I
O(xVPP)
J
Output powered into a short to GND,
STBY = 0 V
30 60
mA
Current limit
‡
xVCC switch
100-mΩ short circuit
100
µs
Current limit
response time
‡
xVPP switch
100-m
Ω
short circuit
16
µ
s
I
I(3.3V)
0.01 2
Normal operation
I
I(5V)
V
O(xVCC)
= V
O(xVPP)
= 5 V
100 120
µA
Normal operation
and in reset
I
I(12V)
V
O(xVCC)
= V
O(xVPP)
= 5 V
6 10
µA
and in reset
mode
I
I(3.3V)
V
I(5V)
= 0, V
O(xVCC)
= 3.3 V,
100 120
I
I
Input current
§
mode
I
I(5V)
V
I(5V)
= 0, V
O(xVCC)
= 3.3 V,
V
O(xVPP)
= 12 V
0
µA
I
I
Input current
§
I
I(12V)
V
O(xVPP)
= 12 V
22 30
µA
I
I(3.3V)
1
Shutdown mode
I
I(5V)
V
O(xVCC)
= Hi-Z, V
O(xVPP)
= Hi-Z
1
µA
Shutdown mode
I
I(12V)
V
O(xVCC)
= Hi-Z, V
O(xVPP)
= Hi-Z
1
µA
Thermal shutdown
‡
Trip point, T
J
155
°C
Thermal shutdown
‡
Hysteresis 10
°
C
†
Pulse-testing techniques maintain junction temperature close to ambient temperature (250-µs-wide pulse, less than 0.5% duty cycle); thermal
effects must be taken into account separately.
‡
Specified by design, not tested in production.
§
Input currents do not include logic input currents (presented in electrical characteristics for logic section); clock is inactive.
NOTE: V
I(3.3V)
or V
I(5V)
must be biased for switches to function.
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