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TI-TPS2220A.pdf
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TI-TPS2220A.pdf
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1
FEATURES APPLICATIONS
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
TPS2223A, TPS2224A
DB OR PWP PACKAGE
(TOP VIEW)
5V
5V
DATA
CLOCK
LATCH
NC
12V
†
AVPP
AVCC
AVCC
GND
RESET
5V
NC
NC
SHDN
12V
†
BVPP
BVCC
BVCC
NC
OC
3.3V
3.3V
NC
−
No
internal
connection
†
Pin 7 and 20 are NC for TPS2223A.
DESCRIPTION
TPS2220A , TPS2223A
TPS2224A , TPS2226A
SLVS428E – MAY 2002 – REVISED MSRCH 2008
www.ti.com
CARDBUS POWER-INTERFACE SWITCHES
FOR SERIAL PCMCIA CONTROLLERS
• Notebook and Desktop Computers
234
• Provides S-CARD and M-CARD Power
Management for CableCARD™ Applications
• Bar Code Scanners
• Digital Cameras
• Single-Slot Switch: TPS2220A
Dual-Slot Switches: TPS2223A, TPS2224A,
• Set-Top Boxes
TPS2226A
• PDAs
• Fast Current Limit Response Time
• Fully Integrated VCC and VPP Switching for
3.3 V, 5 V, and 12 V (no 12 V on TPS2223A)
• Meets Current PC Card™ Standards
• V
pp
Output Selection Independent of V
CC
• 12-V and 5-V Supplies Can Be Disabled
• TTL-Logic Compatible Inputs
• Short-Circuit and Thermal Protection
• 24-Pin HTSSOP, 24- or 30-Pin SSOP
• 140- µ A (Typical) Quiescent Current from
3.3-V Input
• Break-Before-Make Switching
• Power-On Reset
• – 40 ° C to 85 ° C Operating Ambient Temperature
Range
The TPS2223A, TPS2224A, and TPS2226A CardBus™ power-interface switches provide an integrated
power-management solution for two PC Card sockets. The TPS2220A is a single-slot option for this family of
devices. These devices allow the controlled distribution of 3.3 V, 5 V, and 12 V to each card slot. The
current-limiting and thermal-protection features eliminate the need for fuses. Current-limit reporting helps the user
isolate a system fault. The switch r
DS(on)
and current-limit values have been set for the peak and average current
requirements stated in the PC Card specification, and optimized for cost. A faster maximum current limit
response time is the only difference between the TPS2223A, TPS2224A, and TPS2226A and the TPS2223,
TPS2224, and TPS2226.
Like the TPS2214 and TPS2214A and the TPS2216 and TPS2216A, this family of devices supports independent
VPP/VCC switching; however, the standby and interface-mode pins are not supported. Shutdown mode is now
supported independently on SHDN as well as in the serial interface. Optimized for lower power implementation,
the TPS2223A does not support 12-V switching to VPP. For the most current package and ordering information,
see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com .
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2 CableCARD is a trademark of Cable Tevelision Laboratories, Inc..
3 PC Card, CardBus are trademarks of PCMCIA (Personal Computer Memory Card International Association).
4 All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2002 – 2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
www.ti.com
ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATING TABLE
RECOMMENDED OPERATING CONDITIONS
TPS2220A , TPS2223A
TPS2224A , TPS2226A
SLVS428E – MAY 2002 – REVISED MSRCH 2008
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
over operating free-air temperature range (unless otherwise noted)
(1)
TPA222xA UNIT
V
I(3.3V)
– 0.3 to 5.5 V
V
I
Input voltage range for card power V
I(5V)
– 0.3 to 5.5 V
V
I(12V)
(2)
– 0.3 to 14 V
Logic input/output voltage – 0.3 to 6 V
V
O(xVCC)
– 0.3 to 6 V
V
O
Output voltage
V
O(xVPP)
– 0.3 to 14 V
Continuous total power dissipation See Dissipation Rating Table
I
O(xVCC)
Internally Limited
I
O
Output current
I
O(xVPP)
Internally Limited
T
J
Operating virtual junction temperature range – 40 to 100 ° C
T
stg
Storage temperature range – 55 to 150 ° C
OC sink current 10 mA
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Not applicable for TPS2223A
T
A
≤ 25 ° C DERATING FACTOR T
A
= 70 ° C T
A
= 85 ° C
PACKAGE
(1)
POWER RATING ABOVE T
A
= 25 ° C POWER RATING POWER RATING
24 890 mW 8.9 mW/ ° C 489 mW 356 mW
DB
30 1095 mW 10.95 mW/ ° C 602 mW 438 mW
PWP 24 3322 mW 33.22 mW/ ° C 1827 mW 1329 mW
(1) These devices are mounted on an JEDEC low-k board (2-oz. traces on surface).
MIN MAX UNIT
V
I(3.3V)
(1)
3 3.6
Input voltage, V
I(3.3V)
is required for all circuit
operations. 5V and 12V are only required for V
I(5V)
3 5.5 V
their respective functions.
V
I(12V)
(2)
7 13.5
I
O(xVCC)
at T
J
= 100 ° C 1 A
I
O
Output current
I
O(xVPP)
at T
J
= 100 ° C 100 mA
f
(clock)
Clock frequency 2.5 MHz
Data 200
Latch 250
t
w
Pulse duration ns
Clock 100
Reset 100
t
h
Data-to-clock hold time (see Figure 2 ) 100 ns
t
su
Data-to-clock setup time (see Figure 2 ) 100 ns
t
d(latch)
Latch delay time (see Figure 2 ) 100 ns
t
d(clock)
Clock delay time (see Figure 2 ) 250 ns
(1) It is understood that for V
I(3.3V)
< 3 V, voltages within the absolute maximum ratings applied to pin 5V or pin 12V do not damage the IC.
(2) Not applicable for TPS2223A
2 Submit Documentation Feedback Copyright © 2002 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS2220A TPS2223A TPS2224A TPS2226A
www.ti.com
ELECTRICAL CHARACTERISTICS
TPS2220A , TPS2223A
TPS2224A , TPS2226A
SLVS428E – MAY 2002 – REVISED MSRCH 2008
RECOMMENDED OPERATING CONDITIONS (continued)
MIN MAX UNIT
Operating virtual junction temperature (maximum to be calculated at worst case P
D
at 85 ° C
T
J
– 40 100 ° C
ambient)
T
J
= 25 ° C, V
I(5V)
= 5 V, V
I(3.3V)
= 3.3 V, V
I(12V)
= 12 V (not applicable for TPS2223A), all outputs unloaded (unless otherwise
noted)
PARAMETER TEST CONDITIONS
(1)
MIN TYP MAX UNIT
POWER SWITCH
I
O
= 750 mA each 85 110
3.3V to xVCC
(2)
I
O
= 750 mA each, T
J
= 100 ° C 110 140
m Ω
I
O
= 500 mA each 95 130
5V to xVCC
(2)
I
O
= 500 mA each, T
J
= 100 ° C 120 160
Static drain-source
r
DS(on)
on-state resistance
I
O
= 50 mA each 0.8 1
3.3V or 5V to xVPP
(2)
I
O
= 50 mA each, T
J
= 100 ° C 1 1.3
Ω
I
O
= 50 mA each 2 2.5
12V to xVPP
(2)
I
O
= 50 mA each, T
J
= 100 ° C 2.5 3.4
Discharge at xVCC I
O(disc)
= 1 mA 0.5 0.7 1
Output discharge
k Ω
resistance
Discharge at xVPP I
O(disc)
= 1 mA 0.2 0.4 0.5
I
OS(xVCC)
1 1.4 2 A
Limit (steady-state value), output
powered into a short circuit
I
OS(xVPP)
120 200 300 mA
I
OS
Short-circuit output current
Limit (steady-state value), output I
OS(xVCC)
1 1.4 2 A
powered into a short circuit,
I
OS(xVPP)
120 200 300 mA
T
J
= 100 ° C
Thermal trip point Rising temperature 135
Thermal shutdown
T
J
° C
temperature
(2)
Hysteresis 10
5V to xVCC = 5 V, with 100-m Ω short to GND 10
Current-limit response time
(3) (4)
µ s
5V to xVPP = 5 V, with 100-m Ω short to GND 3
I
I(3.3V)
140 200
Normal V
O
(xVCC) = V
O
(xVPP) = 3.3 V and
I
I(5V)
8 12
operation also for RESET = 0 V
I
I(12V)
100 180
I
I
Input current, quiescent µ A
I
I(3.3V)
0.3 2
Shutdown mode I
I(5V)
V
O
(xVCC) = V
O
(xVPP) = Hi-z 0.1 2
I
I(12V)
0.3 2
10
V
O(xVCC)
= 5 V, V
I(5V)
= V
I(12V)
= 0 V
T
J
= 100 ° C 50
Leakage current,
I
lkg
Shutdown mode µ A
output off state
10
V
O(xVPP)
= 12 V, V
I(5V)
= V
I(12V)
= 0 V
T
J
= 100 ° C 50
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
(2) TPS2223A, TPS2224A, TPS2226A: two switches on. TPS2220A: one switch on.
(3) Specified by design; not tested in production.
(4) From application of short to 110% of final current limit.
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TPS2220A TPS2223A TPS2224A TPS2226A
www.ti.com
TPS2220A , TPS2223A
TPS2224A , TPS2226A
SLVS428E – MAY 2002 – REVISED MSRCH 2008
ELECTRICAL CHARACTERISTICS (continued)
T
J
= 25 ° C, V
I(5V)
= 5 V, V
I(3.3V)
= 3.3 V, V
I(12V)
= 12 V (not applicable for TPS2223A), all outputs unloaded (unless otherwise
noted)
PARAMETER TEST CONDITIONS
(1)
MIN TYP MAX UNIT
LOGIC SECTION (CLOCK, DATA, LATCH, RESET, SHDN, OC)
RESET = 5.5 V -1 1
I
I(/RESET)
(5)
RESET = 0 V -30 -20 -10
SHDN = 5.5 V -1 1
I
I(/SHDN)
(5)
I
I
Input current, logic SHDN = 0 V -50 -3 µ A
LATCH = 5.5 V 50
I
I(LATCH)
(5)
LATCH = 0 V -1 1
I
I(CLOCK, DATA)
0 V to 5.5 V -1 1
V
IH
High-level input voltage, logic 2 V
V
IL
Low-level input voltage, logic 0.8 V
V
O(sat)
Output saturation voltage at OC I
O
= 2 mA 0.14 0.4 V
I
lkg
Leakage current at OC V
O(/OC)
= 5.5 V 0 1 µ A
UVLO AND POR (POWER-ON RESET)
V
I(3.3V)
Input voltage at 3.3V pin, UVLO 3.3-V level below which all switches are Hi-Z 2.4 2.7 2.9 V
V
hys(3.3V)
UVLO hysteresis voltage at VA
(6)
100 mV
V
I(5V)
Input voltage at 5V pin, UVLO 5-V level below which only 5V switches are Hi-Z 2.3 2.5 2.8 V
Delay from voltage hit (step from 3 V to 2.3 V) to
V
hys(5V)
UVLO hysteresis voltage at 5V
(6)
100 mV
Hi-Z control (90% V
G
to GND)
t
df
Delay time for falling response, UVLO
(6)
4 µ s
3.3-V voltage below which POR is asserted causing a
V
I(POR)
Input voltage, power-on reset
(6)
RESET internally with all line switches open and all 1.7 V
discharge switches closed.
(5) LATCH has low-current pulldown. RESET and SHDN have low-current pullup.
(6) Specified by design; not tested in production.
4 Submit Documentation Feedback Copyright © 2002 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS2220A TPS2223A TPS2224A TPS2226A
www.ti.com
SWITCHING CHARACTERISTICS
TPS2220A , TPS2223A
TPS2224A , TPS2226A
SLVS428E – MAY 2002 – REVISED MSRCH 2008
V
CC
= 5 V, T
A
= 25 ° C, V
I(3.3V)
= 3.3 V, V
I(5V)
= 5 V, V
I(12)
= 12 V (not applicable for TPS2223A) all outputs unloaded (unless
otherwise noted)
PARAMETER
(1)
LOAD CONDITION TEST CONDITIONS
(2)
MIN TYP MAX UNIT
V
O(xVCC)
= 5 V 0.9
C
L(xVCC)
= 0.1 µ F, C
L(xVPP)
= 0.1 µ F,
I
O(xVCC)
= 0 A, I
O(xVPP)
= 0 A
V
O(xVPP)
= 12 V 0.26
t
r
Output rise times
(3)
ms
V
O(xVCC)
= 5 V 1.1
C
L(xVCC)
= 150 µ F, C
L(xVPP)
= 10 µ F,
I
O(xVCC)
= 0.75 A, I
O(xVPP)
= 50 mA
V
O(xVPP)
= 12 V 0.6
V
O(xVCC)
= 5 V,
0.5
Discharge switches ON
C
L(xVCC)
= 0.1 µ F, C
L(xVPP)
= 0.1 µ F,
I
O(xVCC)
= 0 A, I
O(xVPP)
= 0 A
V
O(xVPP)
= 12 V,
0.2
t
f
Output fall times
(3)
ms
Discharge switches ON
V
O(xVCC)
= 5 V 2.35
C
L(xVCC)
= 150 µ F, C
L(xVPP)
= 10 µ F,
I
O(xVCC)
= 0.75 A, I
O(xVPP)
= 50 mA
V
O(xVPP)
= 12 V 3.9
t
pdon
2
Latch ↑ to xVPP (12V)
(4)
t
pdoff
0.62
t
pdon
0.77
Latch ↑ to xVPP (5V)
t
pdoff
0.51
t
pdon
0.75
C
L(xVCC)
= 0.1 µ F, C
L(xVPP)
= 0.1 µ F,
Latch ↑ to xVPP (3.3V) ms
I
O(xVCC)
= 0 A, I
O(xVPP)
= 0 A
t
pdoff
0.52
t
pdon
0.3
Latch ↑ to xVCC (5V)
t
pdoff
2.5
t
pdon
0.3
Latch ↑ to xVCC (3.3V)
t
pdoff
2.8
Propagation delay
t
pd
times
(3)
t
pdon
2.2
Latch ↑ to xVPP (12V)
(4)
t
pdoff
0.8
t
pdon
0.8
Latch ↑ to xVPP (5V)
t
pdoff
0.6
t
pdon
0.8
C
L(xVCC)
= 150 µ F, C
L(xVPP)
= 10 µ F,
Latch ↑ to xVPP (3.3V) ms
I
O(xVCC)
= 0.75 A, I
O(xVPP)
= 50 mA
t
pdoff
0.6
t
pdon
0.6
Latch ↑ to xVCC (5V)
t
pdoff
2.5
t
pdon
0.5
Latch ↑ to xVCC (3.3V)
t
pdoff
2.6
(1) Refer to Parameter Measurement Information in Figure 1 .
(2) No card inserted, assumes a 0.1- µ F output capacitor (see Figure 1 ).
(3) Specified by design; not tested in production.
(4) Not applicable for TPS2223A
Copyright © 2002 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TPS2220A TPS2223A TPS2224A TPS2226A
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