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THS4521 ADS1278 (CH 1)

49.9 Ω

1 kΩ

49.9 Ω

OCM

IN+

IN-

5 V

COM

1 kΩ

2.2 nF

AINN1

AINP1

0.1 Fμ

1/2

OPA2350

1.5 nF

1 kΩ

100

120

140

-160

Magnitude (dBFS)

16 20

Frequency (kHz)

1-kHz FFT

G = 1

R = R = 1 k

C = 1.5 nF

V = 5 V

Load = 2.2 nF

F G

Tone

(Hz)

1 k

Signal

(dBFS)

0.50-

SNR (dBc)

109.1

THD (dBc)

107.9-

SINAD

(dBc)

105.5

SFDR

(dBc)

113.7

Product

Folder

Sample &

Buy

Technical

Documents

Tools &

Software

Support &

Community

THS4521

THS4522

THS4524

SBOS458H –DECEMBER 2008–REVISED JUNE 2015

THS452x Very Low Power, Negative Rail Input, Rail-To-Rail Output, Fully Differential

Amplifier

1 Features 3 Description

The THS4521, THS4522, and THS4524 family of

• Fully Differential Architecture

devices are very low-power, fully differential

• Bandwidth: 145 MHz (A

= 1 V/V)

amplifiers with rail-to-rail output and an input

• Slew Rate: 490 V/μs

common-mode range that includes the negative rail.

These amplifiers are designed for low-power data

• HD

: –133 dBc at 10 kHz (1 V

RMS

, R

= 1 kΩ)

acquisition systems and high-density applications

• HD

: –141 dBc at 10 kHz (1 V

RMS

, R

= 1 kΩ)

where power dissipation is a critical parameter, and

• Input Voltage Noise: 4.6 nV/√Hz (f = 100 kHz)

provide exceptional performance in audio

applications.

• THD+N: –112dBc (0.00025%) at 1 kHz (22-kHz

BW, G = 1, 5 V

)

The family includes single FDA (THS4521), dual FDA

• Open-Loop Gain: 119 dB (DC)

(THS4522), and quad FDA (THS4524) versions.

• NRI—Negative Rail Input

Device Information

(1)

• RRO—Rail-to-Rail Output

PART NUMBER PACKAGE BODY SIZE (NOM)

• Output Common-Mode Control (with Low Offset)

SOIC (8) 4.90 mm × 3.91 mm

THS4521

• Power Supply:

VSSOP (8) 3.00 mm × 3.00 mm

– Voltage: +2.5 V (±1.25 V) to +5.5 V (±2.75 V)

THS4522 TSSOP (16) 5.00 mm × 4.40 mm

– Current: 1.14 mA/ch

THS4524 TSSOP (38) 9.70 mm × 4.40 mm

• Power-Down Capability: 20 μA (typical)

(1) For all available packages, see the package option addendum

at the end of the datasheet.

2 Applications

• Low-Power SAR and ΔΣ ADC Drivers

• Low-Power Differential Drivers

• Low-Power Differential Signal Conditioning

• Low-Power, High-Performance Differential Audio

Amplifiers

THS4521 and ADS1278 Combined Performance

For more information on this circuit, view SBAU197.

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

THS4521

THS4522

THS4524

SBOS458H –DECEMBER 2008–REVISED JUNE 2015

www.ti.com

Table of Contents

8.3 Feature Description................................................. 25

1 Features.................................................................. 1

8.4 Device Functional Modes........................................ 34

2 Applications ........................................................... 1

8.5 Programming........................................................... 40

3 Description ............................................................. 1

9 Application and Implementation ........................ 41

4 Revision History..................................................... 2

9.1 Application Information............................................ 41

5 Device Comparison Table..................................... 3

9.2 Typical Applications ............................................... 41

6 Pin Configuration and Functions......................... 4

10 Power Supply Recommendations ..................... 51

7 Specifications ......................................................... 7

11 Layout................................................................... 51

7.1 Absolute Maximum Ratings ...................................... 7

11.1 Layout Guidelines ................................................. 51

7.2 ESD Ratings ............................................................ 7

11.2 Layout Example .................................................... 52

7.3 Recommended Operating Conditions....................... 7

12 Device and Documentation Support ................. 53

7.4 Thermal Information.................................................. 7

12.1 Device Support...................................................... 53

7.5 Electrical Characteristics: V

S+

– V

S–

= 3.3 V ............ 8

12.2 Related Links ........................................................ 53

7.6 Electrical Characteristics: V

S+

– V

S–

= 5 V ............. 10

12.3 Community Resources.......................................... 53

7.7 Typical Characteristics............................................ 12

12.4 Trademarks........................................................... 53

7.8 Typical Characteristics: V

S+

– V

S–

= 3.3 V.............. 14

12.5 Electrostatic Discharge Caution............................ 53

7.9 Typical Characteristics: 5 V .................................... 19

12.6 Glossary................................................................ 53

8 Detailed Description ............................................ 24

13 Mechanical, Packaging, and Orderable

8.1 Overview ................................................................. 24

Information ........................................................... 53

8.2 Functional Block Diagram ....................................... 25

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision G (December 2014) to Revision H Page

• Changed capacitor units in front page diagram from mF to µF (typo) ................................................................................... 1

• Changed RF and RG unit in front page FFT plot from kW to kΩ (typo)................................................................................. 1

• Changed Absolute Maximum Ratings minimum storage temperature value from 65 to –65 (typo) ..................................... 7

• Added Community Resources section ................................................................................................................................. 53

Changes from Revision F (September 2011) to Revision G Page

• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional

Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device

and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1

Changes from Revision E (December 2010) to Revision F Page

• Changed Input Offset Current values in 3.3 V Electrical Characteristics............................................................................... 8

• Changed Input Offset Current Drift values in 3.3 V Electrical Characteristics ....................................................................... 8

• Changed Input Offset Current values in 5 V Electrical Characteristics................................................................................ 11

• Changed Input Offset Current Drift values in 5 V Electrical Characteristics ........................................................................ 11

• Changed R41 and R42 in Figure 79..................................................................................................................................... 42

Changes from Revision D (August 2010) to Revision E Page

• Changed test level indication for 5-V input offset voltage drift from B to C.......................................................................... 10