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SLUS536C − AUGUST 2002 − REVISED AUGUST 2004

 

   

FEATURES

D Wide Input Supply Range: −20 V to −80 V

D Transient Rating to −100 V

D Programmable Current Limit

D Programmable Current Slew Rate

D Programmable UV/OV Thresholds/Hysteresis

D Debounced Insertion Detection Inputs

D Open-Drain Power Good (PG) Output

D Fault Timer to Eliminate Nuisance Trips

D Open-Drain Fault Output (FAULT)

D Enable Input (EN)

D 14-Pin TSSOP package

D 44-Pin TSSOP Package for

Creapage/Clearance

APPLICATIONS

D −48-V Distributed Power Systems

D Central Office Switching

D Wireless Base Station

DESCRIPTION

The TPS2392 and TPS2393 integrated circuits are hot

swap power managers optimized for use in nominal

−48-V systems. They operate with supply voltage

ranges from −20-V to −80-V, and are rated to withstand

spikes to −100 V. In conjunction with an external

N-channel FET and sense resistor, they can be used to

enable live insertion of plug-in cards and modules in

powered systems. Each device provides load current

slew rate control and peak magnitude limiting.

Undervoltage and overvoltage shutdown thresholds

are easily programmed via a three-resistor divider

network. In addition, two active-low, debounced inputs

provide plug-in insertion detection. A power good (PG)

output enables downstream converters. The TPS2392

and TPS2393 also provide the basic hot swap functions

of electrical isolation of faulty cards, filtered protection

against nuisance overcurrent trips, and single-line fault

reporting. The 44-pin part supports designs where

telecomm creepage and clearance requirements must

be followed.

The TPS2392 latches off in response to current faults,

while the TPS2393 periodically retries the load in the

event of a fault.

UDG−02098

BAS19

0.1 µF

3.92 kΩ

4.99 kΩ

200 kΩ

20 mΩ

1/4, 1%

10 kΩ

100

kΩ

100 µF

100 V

OUT

= 32.8 V

= 30.8 V

= 72.6 V

GATE

UVLO

INSA

INSB

FAULT

FLTTIME

OVLO

DRAINSNS

ISENS

IRAMP −VIN

RTN

TPS2392/TPS2393

VOUT+

VOUT−

VIN+

VIN−

DC/DC

CONVERTER

1500 pF

VOUT+

VOUT−

GND

3900 pF

−48V

IRF530

5.6 V

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

semiconductor products and disclaimers thereto appears at the end of this data sheet.

www.ti.com





SLUS536C − AUGUST 2002 − REVISED AUGUST 2004

www.ti.com

ELECTRICAL CHARACTERISTICS

I(−VIN)

= −48 V with respect to RTN, V

I(EN)

= 2.8 V, V

I(INSA)

= 0 V, V

I(INSB)

= 0 V, V

I(UVLO)

= 2.5 V, V

I(OVLO)

= 0 V, V

I(ISENS)

= 0 V, all outputs

unloaded, T

= −40°C to 85°C (unless otherwise noted)

(1)(2)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

INPUT SUPPLY

CC1

Supply current, RTN

I(RTN)

= 48 V 1050 1500

CC2

Supply current, RTN

I(RTN)

= 80 V 1350 1700

UVLO_L

Internal UVLO threshold, V

rising To GATE pull-up −19 −16 −13 V

HYS

Internal UVLO hysteresis 200 mV

ENABLE INPUT (EN)

Threshold voltage, V

rising To GATE pull-up 1.3 1.4 1.5 V

SRC_EN

EN pin switched pull-up current −12 −10 −8 µA

UNDERVOLTAGE/OVERVOLTAGE COMPARATORS

TH_UV

Threshold voltage, V

rising, UVLO To GATE pull-up 1.36 1.40 1.44 V

SRC_UV

UVLO pin switched pull-up current V

I(UVLO)

= 2.5 V −11.7 −10.0 −8.3 µA

UVLO low-level input current V

I(UVLO)

= 1 V −1 1 µA

TH_OV

Threshold voltage, V

rising, OVLO To GATE pull-up 1.36 1.40 1.44 V

SRC_OV

OLVO pin switched pull-up current V

I(OVLO)

= 2.5 V −11.7 −10.0 −8.3 µA

OVLO low-level input current V

I(OVLO)

= 1 V −1 1 µA

INSERTION DETECTION

Threshold voltage, V

rising, INSA, INSB To GATE pull-down 1.0 1.4 1.8 V

SRC_INSx

INSA, INSB pin pull-up current V

I(INSA)

= 0 V, V

I(INSB)

= 0 V −14 −11 −8 µA

D_INS

Insertion delay time, V

falling, INSA, INSB To GATE pull-up 1.5 2.5 4.1 ms

LINEAR CURRENT AMPLIFIER (LCA)

High-level output voltage, GATE V

I(ISENS)

= 0 V, I

O(GATE)

= −10 µA 11 14 17 V

SINK

Output sink current, linear mode

I(ISENS)

= 80 mV, V

O(GATE)

= 5 V

O(FLTTIME)

= 2 V

5 10

FAULT

Output sink current, fault shutdown

I(ISENS)

= 80 mV, V

O(GATE)

= 5 V

O(FLTTIME)

> 4 V

50 100

Input current, ISENS 0 V < V

I(ISENS)

< 0.2 V −1 1 µA

REF_K

Reference clamp voltage V

O(IRAMP)

= OPEN 33 40 47

Input offset voltage V

O(IRAMP)

= 2 V −7 7

RAMP GENERATOR

SRC1

IRAMP source current, reduced rate turn-on V

O(IRAMP)

= 0.25 V −850 −600 −400 nA

SRC2

IRAMP source current, normal rate

O(IRAMP)

= 1 V −11 −10 −9

SRC2

IRAMP source current, normal rate

O(IRAMP)

= 3 V −11 −10 −9

Low-level output voltage, IRAMP V

I(EN)

= 0 V 2 mV

Voltage gain, relative to ISENS 9.5 10.0 10.5 mV/V

OVERLOAD COMPARATOR

TH_OL

Current overload threshold, ISENS 80 100 120 mV

DLY

Glitch filter delay time V

I(ISENS)

= 200 mV 2 4 7 µs

(1) All voltages are with respect to the −VIN terminal, unless otherwise stated.

(2) Currents are positive into and negative out of the specified terminals.





SLUS536C − AUGUST 2002 − REVISED AUGUST 2004

www.ti.com

ELECTRICAL CHARACTERISTICS (continued)

I(−VIN)

= −48 V with respect to RTN, V

I(EN)

= 2.8 V, V

I(INSA)

= 0 V, V

I(INSB)

= 0 V, V

I(UVLO)

= 2.5 V, V

I(OVLO)

= 0 V, V

I(ISENS)

= 0 V, all outputs

unloaded, T

= −40°C to 85°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

FAULT TIMER

Low-level output voltage, FLTTIME V

I(EN)

= 0 V 5 mV

CHG

Charging current, current limit mode V

I(ISENS)

= 80 mV, V

O(FLTTIME)

= 2 V −55 −50 −45 µA

FLT

Fault threshold voltage 3.75 4.00 4.25 V

DSG

Discharge current, retry mode TPS2393 V

I(ISENS)

= 80 mV, V

O(FLTTIME)

= 2 V 0.38 0.61 µA

D Output duty cycle TPS2393 V

I(ISENS)

= 80 mV 1.0% 1.5%

RST

Discharge current, timer reset mode V

O(FLTTIME)

= 2 V, V

I(ISENS)

= 0 V 1 mA

POWERGOOD SENSING

DRAINSNS threshold voltage 1.20 1.35 1.50 V

SRC

DRAINSNS pull-up current V

I(DRAINSNS)

= 0 V −14 −11 −8

High-level output leakage current, PG output V

I(EN)

= 0 V, V

O(PG)

= 65 V 10

DS(on)

Driver on-resistance, PG output

I(ISENS)

= 0 V, V

I(DRAINSNS)

= 0 V

O(PG)

= 1 mA

50 80 Ω

FAULT OUTPUT

High-level output leakage current, FAULT V

I(EN)

= 0 V, V

O(FAULT)

= 65 V 10 µA

DS(on)

Driver on-resistance, FAULT

I(ISENS)

= 80 V, V

O(FLTTIME)

= 5 V

O(FAULT)

= 1 mA

50 80 Ω

(1) All voltages are with respect to the −VIN terminal, unless otherwise stated.

(2) Currents are positive into and negative out of the specified terminals.

TERMINAL FUNCTIONS

TERMINAL

I/O

DESCRIPTION

NAME PW DBT

I/O

DESCRIPTION

DRAINSNS 13 41 I Sense input for monitoring the load voltage status

EN 5 14 I Enable input to turn on/off power to the load

FAULT 4 13 O Open-drain, active-low indication of a load fault condition

FLTTIME 6 15 I/O Connection for user-programming of the fault timeout period

GATE 10 28 O Gate drive for external N−channel FET

INSA 2 1 I Insertion detection input pin A

INSB 3 7 I Insertion detection input pin B

IRAMP 7 16 I/O Programming input for setting the inrush current slew rate

ISENS 9 27 I Current sense input

OVLO 14 43 I Voltage sense input for supply overvoltage lockout (OVLO) protection

PG 12 40 O Open-drain, active-low indication of load power-good condition

RTN 11 34 I Positive supply input

UVLO 1 44 I Voltage sense input for supply undervoltage lockout (UVLO) protection

−VIN 8 22 I Negative supply input and reference pin

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