TI-TPS51216.pdf资源-CSDN文库

12

17

16

6

15

14

13

11

V5IN

TPS51216

S3

S5

VREF

VBST

DRVH

SW

DRVL

8

10

REFIN

PGND

7

19

GND

MODE

18 TRIP

20

9

2

3

PGOOD

VDDQSNS

VLDOIN

VTT

1

4

5

VTTSNS

VTTGND

VTTREF

UDG-10138

VDDQ

VTT

PGND

S3

S5

PGND

5VIN

PGND

VIN

VTTREF

AGND

Powergood

TPS51216

www.ti.com

SLUSAB9A –NOVEMBER 2010–REVISED APRIL 2013

Complete DDR2, DDR3 and DDR3L Memory Power Solution Synchronous Buck

Controller, 2-A LDO, Buffered Reference

Check for Samples: TPS51216

1

FEATURES

DESCRIPTION

The TPS51216 provides a complete power supply for

2

• Synchronous Buck Controller (VDDQ)

DDR2, DDR3 and DDR3L memory systems in the

– Conversion Voltage Range: 3 V to 28 V

lowest total cost and minimum space. It integrates a

– Output Voltage Range: 0.7 V to 1.8 V

synchronous buck regulator controller (VDDQ) with a

2-A sink/source tracking LDO (VTT) and buffered low

– 0.8% V

REF

Accuracy

noise reference (VTTREF). The TPS51216 employs

– D-CAP™ Mode for Fast Transient Response

D-CAP™ mode coupled with 300 kHz/400 kHz

– Selectable 300 kHz/400 kHz Switching

frequencies for ease-of-use and fast transient

Frequencies

response. The VTTREF tracks VDDQ/2 within

excellent 0.8% accuracy. The VTT, which provides 2-

– Optimized Efficiency at Light and Heavy

A sink/source peak current capabilities, requires only

Loads with Auto-skip Function

10-μF of ceramic capacitance. In addition, a

– Supports Soft-Off in S4/S5 States

dedicated LDO supply input is available.

– OCL/OVP/UVP/UVLO Protections

The TPS51216 provides rich useful functions as well

– Powergood Output

as excellent power supply performance. It supports

• 2-A LDO(VTT), Buffered Reference(VTTREF)

flexible power state control, placing VTT at high-Z in

S3 and discharging VDDQ, VTT and VTTREF (soft-

– 2-A (Peak) Sink and Source Current

off) in S4/S5 state. Programmable OCL with low-side

– Requires Only 10-μF of Ceramic Output

MOSFET R

DS(on)

sensing, OVP/UVP/UVLO and

Capacitance

thermal shutdown protections are also available.

– Buffered, Low Noise, 10-mA VTTREF

The TPS51216 is available in a 20-pin, 3 mm × 3

Output

mm, QFN package and is specified for ambient

– 0.8% VTTREF, 20-mV VTT Accuracy

temperature from –40°C to 85°C.

– Support High-Z in S3 and Soft-Off in S4/S5

• Thermal Shutdown

• 20-Pin, 3 mm × 3 mm, QFN Package

APPLICATIONS

• DDR2/DDR3/DDR3L Memory Power Supplies

• SSTL_18, SSTL_15, SSTL_135 and HSTL

Termination

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2D-CAP is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

TPS51216

SLUSAB9A –NOVEMBER 2010–REVISED APRIL 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION

(1)

ORDERABLE DEVICE OUTPUT MINIMUM

T

A

PACKAGE PINS

NUMBER SUPPLY QUANTITY

TPS51216RUKR Tape and reel 3000

–40°C to 85°C Plastic Quad Flat Pack (20 pin QFN) 20

TPS51216RUKT Mini reel 250

(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

(1)

over operating free-air temperature range (unless otherwise noted)

VALUE UNIT

MIN MAX

VBST –0.3 36

VBST

(3)

–0.3 6

SW –5 30

Input voltage range

(2)

VLDOIN, VDDQSNS, REFIN –0.3 3.6 V

VTTSNS –0.3 3.6

PGND, VTTGND –0.3 0.3

V5IN, S3, S5, TRIP, MODE –0.3 6

DRVH –5 36

DRVH

(3)

–0.3 6

DRVH

(3)

(duty cycle < 1%) –2.5 6

VTTREF, VREF –0.3 3.6

Output voltage range

(2)

V

VTT –0.3 3.6

DRVL –0.3 6

DRVL (duty cycle < 1%) –2.5 6

PGOOD –0.3 6

Junction temperature range, T

J

125 °C

Storage temperature range, T

STG

–55 150 °C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to the network ground terminal unless otherwise noted.

(3) Voltage values are with respect to the SW terminal.

THERMAL INFORMATION

TPS51216

THERMAL METRIC UNITS

QFN (20) PINS

θ

JA

Junction-to-ambient thermal resistance 94.1

θ

JCtop

Junction-to-case (top) thermal resistance 58.1

θ

JB

Junction-to-board thermal resistance 64.3

°C/W

ψ

JT

Junction-to-top characterization parameter 31.8

ψ

JB

Junction-to-board characterization parameter 58.0

θ

JCbot

Junction-to-case (bottom) thermal resistance 5.9

Product Folder Links :TPS51216

TPS51216

SLUSAB9A –NOVEMBER 2010–REVISED APRIL 2013

www.ti.com

ELECTRICAL CHARACTERISTICS

over operating free-air temperature range, VV5IN=5V, VLDOIN is connected to VDDQ output, V

MODE

=0V, V

S3

=V

S5

=5V (unless

otherwise noted)

PARAMETER TEST CONDITION MIN TYP MAX UNIT

SUPPLY CURRENT

I

V5IN(S0)

V5IN supply current, in S0 T

A

= 25°C, No load, V

S3

= V

S5

= 5 V 590 μA

I

V5IN(S3)

V5IN supply current, in S3 T

A

= 25°C, No load, V

S3

= 0 V, V

S5

= 5 V 500 μA

I

V5INSDN

V5IN shutdown current T

A

= 25°C, No load, V

S3

= V

S5

= 0 V 1 μA

I

VLDOIN(S0)

VLDOIN supply current, in S0 T

A

= 25°C, No load, V

S3

= V

S5

= 5 V 5 μA

I

VLDOIN(S3)

VLDOIN supply current, in S3 T

A

= 25°C, No load, V

S3

= 0 V, V

S5

= 5 V 5 μA

I

VLDOINSDN

VLDOIN shutdown current T

A

= 25°C, No load, V

S3

= V

S5

= 0 V 5 μA

VREF OUTPUT

I

VREF

= 30 μA, T

A

= 25°C 1.8000

V

VREF

Output voltage 0 μA ≤ I

VREF

<300 μA, T

A

= –10°C to 85°C 1.7856 1.8144 V

0 μA ≤ I

VREF

<300 μA, T

A

= –40°C to 85°C 1.7820 1.8180

I

VREFOCL

Current limit V

VREF

= 1.7 V 0.4 0.8 mA

VTTREF OUTPUT

V

VTTREF

Output voltage V

VDDQSNS

/2 V

|I

VTTREF

| <100 μA, 1.2 V ≤ V

VDDQSNS

≤ 1.8 V 49.2% 50.8%

V

VTTREF

Output voltage tolerance to V

VDDQ

|I

VTTREF

| <10 mA, 1.2 V ≤ V

VDDQSNS

≤ 1.8 V 49% 51%

I

VTTREFOCLSRC

Source current limit V

VDDQSNS

= 1.8 V, V

VTTREF

= 0 V 10 18 mA

I

VTTREFOCLSNK

Sink current limit V

VDDQSNS

= 1.8 V, V

VTTREF

= 1.8 V 10 17 mA

I

VTTREFDIS

VTTREF discharge current T

A

= 25°C, V

S3

= V

S5

= 0 V, V

VTTREF

= 0.5 V 0.8 1.3 mA

VTT OUTPUT

V

VTT

Output voltage V

VTTREF

V

|I

VTT

| ≤ 10 mA, 1.2 V ≤ V

VDDQSNS

≤ 1.8 V, I

VTTREF

= 0 A –20 20

|I

VTT

| ≤ 1 A, 1.2 ≤ V

VDDQSNS

≤ 1.8 V, I

VTTREF

= 0 A –30 30

V

VTTTOL

Output voltage tolerance to VTTREF mV

|I

VTT

| ≤ 2 A, 1.4 V ≤ V

VDDQSNS

≤ 1.8 V, I

VTTREF

= 0 A –40 40

|I

VTT

| ≤ 1.5 A, 1.2 V ≤ V

VDDQSNS

≤ 1.4 V, I

VTTREF

= 0 A –40 40

V

VDDQSNS

= 1.8 V, V

VTT

= V

VTTSNS

= 0.7 V,

I

VTTOCLSRC

Source current limit 2 3

I

VTTREF

= 0 A

A

I

VTTOCLSNK

Sink current limit V

VDDQSNS

= 1.8V, V

VTT

= V

VTTSNS

= 1.1 V, I

VTTREF

= 0 A 2 3

I

VTTLK

Leakage current T

A

= 25°C , V

S3

= 0 V, V

S5

= 5 V, V

VTT

= V

VTTREF

5

I

VTTSNSBIAS

VTTSNS input bias current V

S3

= 5 V, V

S5

= 5 V, V

VTTSNS

= V

VTTREF

–0.5 0.0 0.5 μA

I

VTTSNSLK

VTTSNS leakage current V

S3

= 0 V, V

S5

= 5 V, V

VTTSNS

= V

VTTREF

–1 0 1

T

A

= 25°C, V

S3

= V

S5

= 0 V, V

VDDQSNS

= 1.8 V,

I

VTTDIS

VTT Discharge current 7.8 mA

V

VTT

= 0.5 V, I

VTTREF

= 0 A

VDDQ OUTPUT

V

VDDQSNS

VDDQ sense voltage V

REFIN

VDDQSNS regulation voltage

V

VDDQSNSTOL

T

A

= 25°C –3 3 mV

tolerance to REFIN

I

VDDQSNS

VDDQSNS input current V

VDDQSNS

= 1.8 V 39 μA

I

REFIN

REFIN input current V

REFIN

= 1.8 V –0.1 0.0 0.1 μA

V

S3

= V

S5

= 0 V, V

VDDQSNS

= 0.5 V, MODE pin pulled

I

VDDQDIS

VDDQ discharge current 12 mA

down to GND through 47kΩ (Non-tracking)

V

S3

= V

S5

= 0 V, V

VDDQSNS

= 0.5 V, MODE pin pulled

I

VLDOINDIS

VLDOIN discharge current 1.2 A

down to GND through 100kΩ (Non-tracking)

SWITCH MODE POWER SUPPLY (SMPS) FREQUENCY

V

IN

= 12 V, V

VDDQSNS

= 1.8 V, R

MODE

= 100 kΩ 300

f

SW

VDDQ switching frequency kHz

V

IN

= 12 V, V

VDDQSNS

= 1.8 V, R

MODE

= 200 kΩ 400

t

ON(min)

Minimum on time DRVH rising to falling

(1)

60

ns

t

OFF(min)

Minimum off time DRVH falling to rising 200 320 450

(1) Ensured by design. Not production tested.

Product Folder Links :TPS51216

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