TI-BQ2026.pdf资源-CSDN文库

DBZ Package

(Top View)

LP Package

(BottomView)

ID ROM

(64 bits)

EPROM

Memory

(1536 bits)

EPROM

Status

(64 bits)

SDQ Communications

Controller and CRC

Generation Circuit

Internal

Bus

RAM

Buffer

(1 byte)

SDQ

VSS VSS

VSS

SDQ

VSS

1

2

3

1

VSS

2

3

VSS

SDQ

Product

Folder

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bq2026

ZHCS608A –DECEMBER 2011–REVISED OCTOBER 2014

具具有有 SDQ 接接口口的的 1.5K 位位串串行行 EPROM

1 特特性性 3 说说明明

1

• 1536 位的一次性可编程 (OTP) EPROM，用于存

bq2026 是一款 1.5K 位串行 EPROM，此器件包含一

储用户可编程的配置数据

个厂家设定，唯一 48 位识别号，8 位产品编码，和一

• 厂家设定的唯一 64 位识别号

个 64 位状态寄存器。

• 单线制接口以减少电路板布线

bq2026 SDQ™ 接口只要求一个单一连接和一个接地

• 同步通信减少主机中断开销

返回。 SDQ 引脚也是 bq2026 的唯一电源。

• 在数据引脚上的 6KV IEC 61000-4-2 静电放电

(ESD)兼容性

该器件提供小型表面贴装选项，可节省在印刷电路板上

• 无需待机电源

的占用空间，同时拥有低成本优势，非常适合电池组配

• 采用 3 引脚 SOT-23 和 TO-92 封装

置参数、记录保存、资产跟踪、产品版本状态以及代码

访问安全性等应用。

2 应应用用

器器件件信信息息

(1)

• 安全编码

器器件件型型号号封封装装封封装装尺尺寸寸（（标标称称值值））

• 库存跟踪

SOT-23 (3) 4.30mm × 4.30mm

• 产品修正维护

bq2026

TO-92 (3) 2.92mm × 1.30mm

• 电池组识别

(1) 要了解所有可用封装，请见数据表末尾的封装选项附录。

框框图图

注：可将 LP 封装的引脚 3 接地或保持悬空。

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

English Data Sheet: SLUS938

bq2026

ZHCS608A –DECEMBER 2011–REVISED OCTOBER 2014

www.ti.com.cn

目目录录

1 特特性性.......................................................................... 1 7 Detailed Description .............................................. 5

7.1 Overview ................................................................... 5

2 应应用用.......................................................................... 1

7.2 Functional Block Diagram ......................................... 5

3 说说明明.......................................................................... 1

7.3 Feature Description................................................... 5

4 修修订订历历史史记记录录 ........................................................... 2

7.4 Device Functional Modes.......................................... 6

5 Pin Configuration and Functions......................... 3

8 器器件件和和文文档档支支持持...................................................... 15

6 Specifications......................................................... 3

8.1 商标 ......................................................................... 15

6.1 Absolute Maximum Ratings ...................................... 3

8.2 静电放电警告........................................................... 15

6.2 Handling Ratings....................................................... 3

8.3 术语表 ..................................................................... 15

6.3 Electrical Characteristics: DC ................................... 4

9 机机械械、、封封装装和和可可订订购购信信息息 ....................................... 15

6.4 Switching Characteristcs: AC.................................... 4

4 修修订订历历史史记记录录

Changes from Original (April 2013) to Revision A Page

• 已更改文档格式以符合最新数据表标准................................................................................................................................... 1

• 已添加处理额定值表，特性描述，器件功能模式，器件和文档支持以及机械、封装和可订购信息部分.................................. 1

• 已添加注释至首页图 ............................................................................................................................................................... 1

• Changed pin 3 (VSS) description for LP package.................................................................................................................. 3

ID ROM

(64 bits)

EPROM

Memory

(1536 bits)

EPROM

Status

(64 bits)

SDQ Communications

Controller and CRC

Generation Circuit

Internal

Bus

RAM

Buffer

(1 byte)

SDQ

VSS VSS

bq2026

www.ti.com.cn

ZHCS608A –DECEMBER 2011–REVISED OCTOBER 2014

7 Detailed Description

7.1 Overview

The block diagram shows the relationships among the major control and memory sections of the bq2026. The

bq2026 has three main data components: a 64-bit factory-programmed ROM, including 8-bit family code, 48-bit

identification number and 8-bit CRC value, 1536-bit EPROM, and EPROM Status bytes. Power for read and write

operations is derived from the SDQ pin. An internal capacitor stores energy while the signal line is high, and

releases energy during the low times of the SDQ pin until the pin returns high to replenish the charge on the

capacitor.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 EPROM

Table 1 is a memory map of the 1536-bit EPROM section of the bq2026, configured as six pages of 32 bytes

each. The 1-byte RAM buffer is an additional register used when programming the memory. Data are first written

to the RAM buffer and then verified by reading a 16-bit CRC from the bq2026 that confirms proper receipt of the

data. If the buffer contents are correct, a programming pulse is issued and a 1-byte segment of data is written

into the selected address in memory. This process ensures data integrity when programming the memory. The

details for reading and programming the 1536-bit EPROM portion of the bq2026 are in the Memory and Status

Function Commands section of this data sheet.

Table 1. 1536-Bit EPROM Data Memory Map

ADDRESS (HEX) PAGE

00A0-00BF Page 5

0080-009F Page 4

0060-007F Page 3

0040-005F Page 2

0020-003F Page 1

0000-001F Page 0

7.3.2 EPROM Status Memory

In addition to the programmable 1536-bits of memory are eight bytes of status information, the first seven bytes

are available to the user, contained in the EPROM status memory. The status memory is accessible with

separate commands. The status bytes are EPROM and are read or programmed to indicate various conditions to

the software interrogating the bq2026. These general-purpose bytes can be used by the customer to store

various information.

Table 2. EPROM Status Bytes

ADDRESS (HEX) PAGE

100h-107h General-purpose OTP status memory

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