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TI-LM117HVQML.pdf
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TI-LM117HVQML.pdf
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![](https://csdnimg.cn/release/download_crawler_static/86841045/bg1.jpg)
LM117HVQML, LM117HVQML-SP
www.ti.com
SNVS357D –MARCH 2006–REVISED APRIL 2013
LM117HVQML 3-Terminal Adjustable Regulator
Check for Samples: LM117HVQML, LM117HVQML-SP
1
FEATURES
DESCRIPTION
The LM117HV are adjustable 3-terminal positive
2
• Available with Radiation Ensured
voltage regulators capable of supplying either 0.5A or
– Total Ionizing Dose 100 krad(Si)
1.5A over a 1.2V to 57V output range. They are
– Low Dose Rate Qualified 100 krad(Si)
exceptionally easy to use and require only two
external resistors to set the output voltage. Further,
• Adjustable Output down to 1.2V
both line and load regulation are better than standard
• Specified 0.5A or 1.5A Output Current
fixed regulators.
• Line Regulation Typically 0.01%/V
In addition to higher performance than fixed
• Load Regulation Typically 0.1%
regulators, the LM117HV series offers full overload
• Current Limit Constant with Temperature
protection available only in IC's. Included on the chip
are current limit, thermal overload protection and safe
• Eliminates the Need to Stock Many Voltages
area protection. All overload protection circuitry
• 80 dB Ripple Rejection
remains fully functional even if the adjustment
• Output is Short-Circuit Protected
terminal is disconnected.
Normally, no capacitors are needed unless the device
is situated more than 6 inches from the input filter
capacitors in which case an input bypass is needed.
An optional output capacitor can be added to improve
transient response. The adjustment terminal can be
bypassed to achieve very high ripple rejections ratios
which are difficult to achieve with standard 3-terminal
regulators.
Besides replacing fixed regulators, the LM117HV is
useful in a wide variety of other applications. Since
the regulator is “floating” and sees only the input-to-
output differential voltage, supplies of several
hundred volts can be regulated as long as the
maximum input to output differential is not exceeded,
i.e. do not short the output to ground.
Also, it makes an especially simple adjustable
switching regulator, a programmable output regulator,
or by connecting a fixed resistor between the
adjustment and output, the LM117HV can be used as
a precision current regulator. Supplies with electronic
shutdown can be achieved by clamping the
adjustment terminal to ground which programs the
output to 1.2V where most loads draw little current.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
![](https://csdnimg.cn/release/download_crawler_static/86841045/bg2.jpg)
N/C N/C1 16
N/C N/C2 15
ADJ N/C3 14
N/C OUTPUT/SENSE4 13
INPUT OUTPUT5 12
N/C N/C6 11
N/C N/C7 10
N/C N/C
8
9
LM117HVQML, LM117HVQML-SP
SNVS357D –MARCH 2006–REVISED APRIL 2013
www.ti.com
CONNECTION DIAGRAMS
(See Physical Dimension section for further information)
CASE IS OUTPUT
CASE IS OUTPUT
Figure 1. 3-Pin TO Metal Can Package Figure 2. 2-Pin TO Metal Can Package
Bottom View Bottom View
See NDT003A Package See K0002C Package
For the CFP device to function properly, the “Output” and “Output/Sense” pins must be connected on the users
printed circuit board.
Figure 3. 16-Pin CFP
Top View
Table 1. LM117HV Series Packages
Part Number Suffix Package Design Load Current
H TO 0.5A
K TO 1.5A
WG, GW CFP 0.5A
2 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM117HVQML LM117HVQML-SP
![](https://csdnimg.cn/release/download_crawler_static/86841045/bg4.jpg)
LM117HVQML, LM117HVQML-SP
SNVS357D –MARCH 2006–REVISED APRIL 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)
Power Dissipation
(2)
Internally limited
Input - Output Voltage Differential +60V, −0.3V
Maximum Junction Temperature +150°C
Storage Temperature −65°C ≤ T
A
≤ +150°C
Lead Temperature (Soldering, 10 sec.) 300°C
Thermal Resistance θ
JA
TO Metal Can - Still Air 39°C/W
TO Metal Can - 500LF/Min Air flow 14°C/W
TO Metal Can - Still Air 186°C/W
TO Metal Can - 500LF/Min Air flow 64°C/W
CFP "WG" (device 01, 61) - Still Air 115°C/W
CFP "WG" (device 01, 61) - 500LF/Min Air flow 66°C/W
CFP "GW" (device 02, 62) - Still Air 130°C/W
CFP "GW" (device 02, 62) - 500LF/Min Air flow 80°C/W
θ
JC
TO Metal Can 1.9°C/W
TO Metal Can 21°C/W
CFP "WG" (device 01, 61)
(3)
3.4°C/W
CFP "GW" (device 02, 62) 7°C/W
ESD Tolerance
(4)
2000V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the
Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions.
(2) The maximum power dissipation must be derated at elevated temperatures and is dictated by T
Jmax
(maximum junction temperature),
θ
JA
(package junction to ambient thermal resistance), and T
A
(ambient temperature). The maximum allowable power dissipation at any
temperature is P
Dmax
= (T
Jmax
- T
A
) / θ
JA
or the number given in the Absolute Maximum Ratings, whichever is lower. "Although power
dissipation is internally limited, these specifications are applicable for power dissipations of 2W for the PFM package and 20W for the
TO package."
(3) The package material for these devices allows much improved heat transfer over our standard ceramic packages. In order to take full
advantage of this improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either
metal traces on, or thermal vias through, the printed circuit board. Without this additional heat sinking, device power dissipation must be
calculated using θ
JA
, rather than θ
JC
, thermal resistance. It must not be assumed that the device leads will provide substantial heat
transfer out the package, since the thermal resistance of the lead frame material is very poor, relative to the material of the package
base. The stated θ
JC
thermal resistance is for the package material only, and does not account for the additional thermal resistance
between the package base and the printed circuit board. The user must determine the value of the additional thermal resistance and
must combine this with the stated value for the package, to calculate the total allowed power dissipation for the device.
(4) Human body model, 1.5 kΩ in series with 100 pF.
Recommended Operating Conditions
Operating Temperature Range −55°C ≤ T
A
≤ +125°C
Table 2. Quality Conformance Inspection
Mil-Std-883, Method 5005 - Group A
Subgroup Description Temp °C
1 Static tests at 25
2 Static tests at 125
3 Static tests at -55
4 Dynamic tests at 25
5 Dynamic tests at 125
6 Dynamic tests at -55
7 Functional tests at 25
8A Functional tests at 125
4 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM117HVQML LM117HVQML-SP
![](https://csdnimg.cn/release/download_crawler_static/86841045/bg5.jpg)
LM117HVQML, LM117HVQML-SP
www.ti.com
SNVS357D –MARCH 2006–REVISED APRIL 2013
Table 2. Quality Conformance Inspection (continued)
Mil-Std-883, Method 5005 - Group A
Subgroup Description Temp °C
8B Functional tests at -55
9 Switching tests at 25
10 Switching tests at 125
11 Switching tests at -55
12 Settling time at 25
13 Settling time at 125
14 Settling time at -55
LM117HVH, HVWG Electrical Characteristics DC Parameters
The following conditions apply, unless otherwise specified. V
Diff
= (V
I
− V
O
), I
L
= 8mA, V
OUT
= 1.25V (Nominal)
Sub-
Symbol Parameter Conditions Notes Min Max Unit
groups
I
Adj
Adjustment Pin Current V
Diff
= 3V 100 µA 1
V
Diff
= 3.3V 100 µA 2, 3
V
Diff
= 40V 100 µA 1, 2, 3
I
Q
Minimum Load Current V
Diff
= 3V, V
O
= 1.7V 5.0 mA 1
V
Diff
= 3.3V, V
O
= 1.7V 5.0 mA 2, 3
V
I
= 40V, V
O
= 1.7V 5.0 mA 1, 2, 3
V
I
= 60V, V
O
= 1.7V 8.2 mA 1
V
Ref
Reference Voltage V
Diff
= 3V 1.2 1.3 V 1
V
Diff
= 3.3V 1.2 1.3 V 2, 3
V
Diff
= 40V 1.2 1.3 V 1, 2, 3
V
RLine
Line Regulation 3V ≤ V
Diff
≤ 40V, -8.64 8.64 mV 1
V
O
= V
Ref
3.3V ≤ V
Diff
≤ 40V, -18 18 mV 2, 3
V
O
= V
Ref
40V ≤ V
Diff
≤ 60V, -25 25 mV 1
I
L
= 60mA
V
RLoad
Load Regulation V
Diff
= 3V, -15 15 mV 1
I
L
= 10mA to 500mA
V
Diff
= 3.3V, -15 15 mV 2, 3
I
L
= 10mA to 500mA
V
Diff
= 40V, -15 15 mV 1
I
L
= 10mA to 150mA
V
Diff
= 40V, -15 15 mV 2, 3
I
L
= 10mA to 100mA
Delta I
Adj
/ Adjustment Pin Current Change V
Diff
= 3V, -5.0 5.0 µA 1
Load I
L
= 10mA to 500mA
V
Diff
= 3.3V, -5.0 5.0 µA 2, 3
I
L
= 10mA to 500mA
V
Diff
= 40V, -5.0 5.0 µA 1
I
L
= 10mA to 150mA
V
Diff
= 40V, -5.0 5.0 µA 2, 3
I
L
= 10mA to 100mA
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: LM117HVQML LM117HVQML-SP
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