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SLES005A − JUNE 2001 − REVISED FEBRUARY 2002

  

  

www.ti.com

FEATURES

Supports DSD and PCM Format

D Accepts 16-, 18-, 20- and 24-Bit Audio Data for

PCM Format

D Accepts Direct Stream Digital (1 bit)

D Analog Performance (V

= 5 V):

− Dynamic Range: 106 dB Typ

− SNR: 106 dB Typ

− THD+N: 0.0015% Typ

− Full−Scale Output: 3.1 V(pp) Typ

D Includes 8x Oversampling Digital Filter for

PCM Format:

− Stopband Attenuation: –60 dB

− Passband Ripple: ±0.02 dB

D Including Digital DSD Filter For DSD Format:

− Passband Choices: 50 kHz, 70 kHz or

60 kHz at −3 dB

D Sampling Frequency:

− PCM Mode: 10 kHz to 200 kHz

− DSD Mode: 64 × 44.1 kHz

D System Clock:

− 128f

192f

, 256f

, 384f

512f

, 768f

D Data Formats:

− Standard, I

S, and Left-Justified for PCM

Direct Stream Digital

D User-Programmable Mode Controls:

− Digital Attenuation

− Digital De-Emphasis

− Digital Filter Roll-Off: Sharp or Slow Soft

Mute

− Zero Detect Mute

− Zero Flags for Each Output

D Dual Supply Operation:

5-V Analog, 3.3-V Digital

D 5-V Tolerant Digital Inputs

D Small 20-Lead QSOP Package

APPLICATIONS

Universal A/V Players

D SACD Players

D Car Audio Systems

D Other Applications Requiring 24-Bit Audio

DESCRIPTION

The DSD1702 is a CMOS, monolithic, stereo

digital-to-analog converter that supports both PCM

audio data format and direct stream digital (DSD) audio

data format.

The device includes an 8x digital interpolation filter for

PCM signals. A digital DSD filter provides three different

selectable frequency response options, followed by

Burr-Brown’s enhanced multilevel delta-sigma

modulator employing 4th-order noise shaping and

8-level amplitude quantization. This design achieves

excellent dynamic performance and improved

tolerance to clock jitter.

DSD1702 sampling rates of up to 192 kHz for PCM

mode and 44.1 kHz × 64 for DSD mode are supported.

A full set of user-programmable functions is accessible

through a 3-wire serial control port, supporting register

write functions.

The DSD1702 is available in a 20-lead QSOP package.

This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate

precaustions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

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PowerPAD is a trademark of Texas Instruments.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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SLES005A − JUNE 2001 − REVISED FEBRUARY 2002

www.ti.com

Terminal Functions

TERMINAL

I/O

DESCRIPTIONS

NAME PIN

I/O

DESCRIPTIONS

DSDL 1 I Audio data digital input (DSD L−channel) (see Note 1)

DSDR 2 I Audio data digital input (DSD R−channel) (see Note 1)

PBCK 3 I Audio data bit clock input. (PCM) (see Note 1)

PDATA 4 I Audio data digital input. (PCM) (see Note 1)

PLRCK 5 I Audio data latch enable input. (PCM) (see Note 1)

DGND 6 − Digital ground

7 − Digital power supply, 3.3 V

8 − Analog power supply, 5 V

OUT

L 9 O Analog output for L−channel

OUT

R 10 O Analog output for R−channel

AGND 11 − Analog ground

COM

12 − Common voltage decoupling

ZEROR/ZEROA 13 O Zero flag output for R−channel/zero flag output for L/R−channel. (see Note 3)

ZEROL/NA 14 O Zero flag output for L−channel/no assignment (see Note 3)

MD 15 I Mode control data Input. (see Note 2)

MC 16 I Mode control clock input. (see Note 2)

MS 17 I Chip Select for Mode control. (see Note 2)

PSCK 18 I System clock input. (PCM) (see Note 1)

DSCK 19 I System clock input. (DSD) (see Note 1)

DBCK 20 I Audio data bit clock input. (DSD) (see Note 1)

NOTES: 1. Schmitt trigger input, 5-V tolerant.

2. Schmitt trigger input with internal pulldown, 5-V tolerant.

3. Usage depending on AZRO register setting.

absolute maximum ratings

†

Supply voltage, V

6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Supply voltage, V

4 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Ground voltage differences, AGND, DGND ±0.1 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Digital input voltage −0.3 V to (6.5 V + 0.3 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input current (Any pins except supplies) ±10 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Ambient temperature under bias −40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature −55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Junction temperature 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature (soldering) 260°C, 5 sec. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package temperature (IR reflow, peak) 235°C, 10 sec. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.