没有合适的资源?快使用搜索试试~ 我知道了~
TI-SN74LV4040A-EP.pdf
需积分: 5 0 下载量 77 浏览量
2022-11-29
12:54:02
上传
评论 4
收藏 846KB PDF 举报
温馨提示
![preview](https://dl-preview.csdnimg.cn/87203330/0001-e5f2912114d6d974e160de8dbf38c4c5_thumbnail.jpeg)
![preview-icon](https://csdnimg.cn/release/downloadcmsfe/public/img/scale.ab9e0183.png)
试读
14页
TI-SN74LV4040A-EP.pdf
资源推荐
资源详情
资源评论
![](https://csdnimg.cn/release/download_crawler_static/87203330/bg1.jpg)
1
FEATURES
SN74LV4040A ...PWPACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Q
L
Q
F
Q
E
Q
G
Q
D
Q
C
Q
B
GND
V
CC
Q
K
Q
J
Q
H
Q
I
CLR
CLK
Q
A
DESCRIPTION/ORDERING INFORMATION
SN74LV4040A-EP
12 BIT ASYNCHRONOUS BINARY COUNTERS
SGDS030 – SEPTEMBER 2007
www.ti.com
• Controlled Baseline • I
off
Supports Partial-Power-Down Mode
Operation
– One Assembly
• Latch-Up Performance Exceeds 100 mA Per
– Test Site
JESD 78, Class II
– One Fabrication Site
• ESD Protection Exceeds JESD 22
• Extended Temperature Performance of – 55 ° C
– 2000-V Human-Body Model (A114-A)
to 125 ° C
– 200-V Machine Model (A115-A)
• Enhanced Diminishing Manufacturing Sources
(DMS) Support – 1000-V Charged-Device Model (C101)
• Enhanced Product-Change Notification xxx
• Qualification Pedigree
(1)
• 2-V to 5.5-V V
CC
Operation
• Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25 ° C
• Typical V
OHV
(Output V
OH
Undershoot)
>2.3 V at V
CC
= 3.3 V, T
A
= 25 ° C
• Support Mixed-Mode Voltage Operation on All
Ports
• High On-Off Output-Voltage Ratio
• Low Crosstalk Between Switches
• Individual Switch Controls
• Extremely Low Input Current
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
The SN74LV4040A device is a 12 bit asynchronous binary counter with the outputs of all stages available
externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low. The
count is advanced on a high-to-low transition at the clock (CLK) input. Applications include time-delay circuits,
counter controls, and frequency-dividing circuits.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the devices when they are powered down.
ORDERING INFORMATION
(1)
T
A
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
– 55 ° C to 125 ° C TSSOP – PW Reel of 2000 SN74LV4040AMPWREP LW040A
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com .
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
![](https://csdnimg.cn/release/download_crawler_static/87203330/bg2.jpg)
www.ti.com
R
T
R
T
R
T
R
T
R
T
R
T
R
T
R
T
R
T
R
T
R
T
R
T
9 5 3
2 4 13 12 14 15 1
11
10
CLR
CLK
Q
A
Q
D
Q
E
Q
H
Q
K
Q
L
Q
F
Q
G
Q
I
Q
J
7
Q
B
6
Q
C
Absolute Maximum Ratings
(1)
SN74LV4040A-EP
12 BIT ASYNCHRONOUS BINARY COUNTERS
SGDS030 – SEPTEMBER 2007
FUNCTION TABLE
(each buffer)
INPUTS FUNCTION
CLK CLR
↑ L No change
↓ L Advance to next stage
X H All outputs L
LOGIC DIAGRAM (POSITIVE LOGIC)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range – 0.5 7 V
V
I
Input voltage range
(2)
– 0.5 7 V
V
O
Voltage range applied to any output in the high-impedance or power-off state
(2)
– 0.5 7 V
V
O
Output voltage range
(2) (3)
– 0.5 V
CC
+ 0.5 V
I
IK
Input clamp current V
I
< 0 – 20 mA
I
OK
Output clamp current V
O
< 0 – 50 mA
I
O
Continuous output current V
O
= 0 to V
CC
± 25 mA
Continuous current through V
CC
or GND ± 50 mA
θ
JA
Package thermal impedance
(4)
108 ° C/W
T
stg
Storage temperature range – 65 150 ° C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) This value is limited to 5.5 V maximum.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
2 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): SN74LV4040A-EP
![](https://csdnimg.cn/release/download_crawler_static/87203330/bg3.jpg)
www.ti.com
Recommended Operating Conditions
(1)
Electrical Characteristics
SN74LV4040A-EP
12 BIT ASYNCHRONOUS BINARY COUNTERS
SGDS030 – SEPTEMBER 2007
MIN MAX UNIT
V
CC
Supply voltage 2 5.5 V
V
CC
= 2 V 1.5
V
CC
= 2.3 to 2.7 V V
CC
× 0.7
V
IH
High-level input voltage V
V
CC
= 3 V to 3.6 V V
CC
× 0.7
V
CC
= 4.5 to 5.5 V V
CC
× 0.7
V
CC
= 2 V 0.5
V
CC
= 2.3 to 2.7 V V
CC
× 0.3
V
IL
Low-level input voltage V
V
CC
= 3 V to 3.6 V V
CC
× 0.3
V
CC
= 4.5 to 5.5 V V
CC
× 0.3
V
I
Input voltage 0 5.5 V
V
O
Output voltage 0 V
CC
V
V
CC
= 2 V – 50
V
CC
= 2.3 to 2.7 V – 2
I
OH
High-level output current mA
V
CC
= 3 V to 3.6 V – 6
V
CC
= 4.5 to 5.5 V – 12
V
CC
= 2 V 50 μ A
V
CC
= 2.3 to 2.7 V 2
I
OL
Low-level output current
V
CC
= 3 V to 3.6 V 6 mA
V
CC
= 4.5 to 5.5 V 12
V
CC
= 2.3 to 2.7 V 200
Δ t/ Δ v Input transition rise or fall rate V
CC
= 3 V to 3.6 V 100 ns/V
V
CC
= 4.5 to 5.5 V 20
T
A
Operating free-air temperature – 55 125 ° C
(1) All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
I
OH
= – 50 μ A 2 V to 5.5 V V
CC
– 0.1
I
OH
= – 2 mA 2.3 V 2
V
OH
V
I
OH
= – 6 mA 3 V 2.48
I
OH
= – 12 mA 4.5 V 3.8
I
OL
= 50 μ A 2 V to 5.5 V 0.1
I
OL
= 2 mA 2.3 V 0.4
V
OL
V
I
OL
= 6 mA 3 V 0.44
I
OL
= 12 mA 4.5 V 0.55
I
I
V
I
= 5.5 V or GND 0 to 5.5 V ± 1 μ A
I
CC
V
I
= V
CC
or GND, I
O
= 0 5.5 V 20 μ A
I
off
V
I
or V
O
= 0 to 5.5 V 0 5 μ A
C
i
V
I
= V
CC
or GND 3.3 V 1.9 pF
Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): SN74LV4040A-EP
剩余13页未读,继续阅读
资源评论
![avatar-default](https://csdnimg.cn/release/downloadcmsfe/public/img/lazyLogo2.1882d7f4.png)
![avatar](https://profile-avatar.csdnimg.cn/107303f5121d47e49d12d0a9ae68af10_weixin_54787054.jpg!1)
不觉明了
- 粉丝: 3225
- 资源: 5611
上传资源 快速赚钱
我的内容管理 展开
我的资源 快来上传第一个资源
我的收益
登录查看自己的收益我的积分 登录查看自己的积分
我的C币 登录后查看C币余额
我的收藏
我的下载
下载帮助
![voice](https://csdnimg.cn/release/downloadcmsfe/public/img/voice.245cc511.png)
![center-task](https://csdnimg.cn/release/downloadcmsfe/public/img/center-task.c2eda91a.png)
安全验证
文档复制为VIP权益,开通VIP直接复制
![dialog-icon](https://csdnimg.cn/release/downloadcmsfe/public/img/green-success.6a4acb44.png)