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TI-TLA2528.pdf
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TI-TLA2528.pdf
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ADVANCEINFORMATION
Example Applications
Device Block Diagram
Controller
TLA2528
I
2
C
AVDD (V
REF
)
AIN / GPIO
AIN / GPIO
AIN / GPIO
AIN / GPIO
AIN / GPIO
AIN / GPIO
AIN / GPIO
AIN / GPIO
V
SIGNAL
+ noise
R
1
R
2
Reduced
noise
TLA2528
Controller
TLA2528
AIN0 / GPIO0
AIN1 / GPIO1
AIN2 / GPIO2
AIN3 / GPIO3
ADC
MUX
GPO Write
GPI Read
Pin CFG
AIN4 / GPIO4
AIN5 / GPIO5
AIN6 / GPIO6
AIN7 / GPIO7
Sequencer
I
2
C Interface
AVDD
GND
DVDD
SDA
SCL
ADDR
DECAP
Programmable
Averaging Filter
Product
Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
Community
本文档旨在为方便起见,提供有关 TI 产品中文版本的信息,以确认产品的概要。 有关适用的官方英文版本的最新信息,请访问 www.ti.com,其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SBAS961
TLA2528
ZHCSJS9 –MAY 2019
TLA2528 小小型型 8 通通道道 12 位位 ADC,,具具有有 I
2
C 接接口口 及及 GPIO
1
1 特特性性
1
• 小封装尺寸:
– 3mm × 3mm WQFN
• 8 通道,可配置为以下任意组合:
– 最多 8 个模拟输入、数字输入或数字输出
• 用于 I/O 扩展的 GPIO:
– 开漏、推挽数字输出
• 宽工作范围:
– AVDD:2.35V 至 5.5V
– DVDD:1.65V 至 5.5V
– 温度范围:–40°C 至 +85°C
• I
2
C 接口:
– 高达 3.4MHz(高速)
– 8 个可配置 I
2
C 地址
• 可编程均值滤波器:
– 用于求平均值的可编程样本大小
– 利用内部转换求平均值
– 用于计算平均输出的 16 位分辨率
2 应应用用
• 监控功能
• 便携式仪表
• 电信基础设施
• 电源监控
3 说说明明
TLA2528 是一款易于使用的 8 通道多路复用 12 位逐
次逼近寄存器模数转换器 (SAR ADC)。8 个通道可独
立配置为模拟输入、数字输入或数字输出。该器件具有
一个用于执行 ADC 转换过程的内部振荡器。
TLA2528 通过 I
2
C 兼容接口进行通信,支持标准模式
(100kHz)、快速模式 (400kHz)、快速模式+ (1MHz) 和
高速模式 (3.4MHz)。通过在 ADDR 引脚上连接一个电
阻,可为 TLA2528 选择最多 8 个 I
2
C 地址。
器器件件信信息息
(1)
部部件件名名称称 封封装装 封封装装尺尺寸寸((标标称称值值))
TLA2528 WQFN (16) 3.00mm × 3.00mm
(1) 如需了解所有可用封装,请见数据表末尾的可订购产品附录。
TLA2528 方方框框图图和和 应应用用
ADVANCEINFORMATION
2
TLA2528
ZHCSJS9 –MAY 2019
www.ti.com.cn
Copyright © 2019, Texas Instruments Incorporated
目目录录
1 特特性性.......................................................................... 1
2 应应用用.......................................................................... 1
3 说说明明.......................................................................... 1
4 修修订订历历史史记记录录 ........................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 I
2
C Timing Requirements.......................................... 6
6.7 Timing Requirements................................................ 6
6.8 I
2
C Switching Characteristics.................................... 6
6.9 Switching Characteristics.......................................... 7
7 Detailed Description.............................................. 8
7.1 Overview ................................................................... 8
7.2 Functional Block Diagram ......................................... 8
7.3 Feature Description................................................... 9
7.4 Device Functional Modes........................................ 13
7.5 Programming........................................................... 16
7.6 TLA2528 Registers ................................................. 19
8 Application and Implementation ........................ 26
8.1 Application Information............................................ 26
8.2 Typical Applications ................................................ 26
9 Power Supply Recommendations...................... 28
9.1 AVDD and DVDD Supply Recommendations......... 28
10 Layout................................................................... 29
10.1 Layout Guidelines ................................................. 29
10.2 Layout Example .................................................... 29
11 器器件件和和文文档档支支持持 ..................................................... 30
11.1 接收文档更新通知 ................................................. 30
11.2 社区资源................................................................ 30
11.3 商标 ....................................................................... 30
11.4 静电放电警告......................................................... 30
11.5 Glossary................................................................ 30
12 机机械械、、封封装装和和可可订订购购信信息息....................................... 30
4 修修订订历历史史记记录录
注:之前版本的页码可能与当前版本有所不同。
日日期期 修修订订版版本本 说说明明
2019 年 5 月 * 初始发行版。
ADVANCEINFORMATION
1
2
3
4
12
11
10
9
165
15
14
13
6
7
8
Thermal
Pad
AIN0 / GPIO0
AIN1 / GPIO1
AIN2 / GPIO2
AIN3 / GPIO3
AIN4 / GPIO4
AIN5 / GPIO5
AIN6 / GPIO6
AIN7 / GPIO7
SDA
GND
DVDD
SCL
NC
ADDR
AVDD
DECAP
3
TLA2528
www.ti.com.cn
ZHCSJS9 –MAY 2019
Copyright © 2019, Texas Instruments Incorporated
5 Pin Configuration and Functions
RTE Package
16-Pin WQFN
Top View
(1) AI = analog input, DI = digital input, and DO = digital output.
Pin Functions
PIN
FUNCTION
(1)
DESCRIPTION
NAME NO.
AIN0/GPIO0 15 AI, DI, DO
Channel 0; configurable as either an analog input (default) or a general-purpose
input/output (GPIO)
AIN1/GPIO1 16 AI, DI, DO Channel 1; configurable as either an analog input (default) or a GPIO
AIN2/GPIO2 1 AI, DI, DO Channel 2; configurable as either an analog input (default) or a GPIO
AIN3/GPIO3 2 AI, DI, DO Channel 3; configurable as either an analog input (default) or a GPIO
AIN4/GPIO4 3 AI, DI, DO Channel 4; configurable as either an analog input (default) or a GPIO
AIN5/GPIO5 4 AI, DI, DO Channel 5; configurable as either an analog input (default) or a GPIO
AIN6/GPIO6 5 AI, DI, DO Channel 6; configurable as either an analog input (default) or a GPIO
AIN7/GPIO7 6 AI, DI, DO Channel 7; configurable as either an analog input (default) or a GPIO
ADDR 11 AI
Input for selecting the device I
2
C address.
Connect a resistor to this pin from DECAP pin or GND to select one of the eight
addresses.
AVDD 7 Supply
Analog supply input, also used as the reference voltage to the ADC; connect a
1-µF decoupling capacitor to GND
DECAP 8 Supply Connect a decoupling capacitor to this pin for the internal power supply
DVDD 10 Supply Digital I/O supply voltage; connect a 1-µF decoupling capacitor to GND
GND 9 Supply
Ground for the power supply; all analog and digital signals are referred to this
pin voltage
NC No connection This pin must be left floating with no external connection
SDA 14 DI, DO Serial data input or output for the I
2
C interface
SCL 13 DI Serial clock for the I
2
C interface
ADVANCEINFORMATION
4
TLA2528
ZHCSJS9 –MAY 2019
www.ti.com.cn
Copyright © 2019, Texas Instruments Incorporated
(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) AINx/GPIOx refers to pins 1, 2, 3, 4, 5, 6, 15, and 16.
(3) Pin current must be limited to 10mA or less.
6 Specifications
6.1 Absolute Maximum Ratings
over operating ambient temperature range (unless otherwise noted)
(1)
MIN MAX UNIT
DVDD to GND –0.3 5.5 V
AVDD to GND –0.3 5.5 V
AINx/GPOx
(2)
GND – 0.3 AVDD + 0.3 V
ADDR GND – 0.3 2.1 V
Digital inputs GND – 0.3 5.5 V
Current through any pin except supply pins
(3)
–10 10 mA
Junction temperature, T
J
–40 125 °C
Storage temperature, T
stg
–60 150 °C
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings
VALUE UNIT
V
(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins
(1)
±2000
V
Charged device model (CDM), per JEDEC specification JESD22-C101, all
pins
(2)
±500
(1) AINx refers to AIN0, AIN1, AIN2, AIN3, AIN4, AIN5, AIN6, and AIN7.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLY
AVDD Analog supply voltage 2.35 3.3 5.5 V
DVDD Digital supply voltage 1.65 3.3 5.5 V
ANALOG INPUTS
FSR Full-scale input range AIN
X
(1)
- GND 0 AVDD V
V
IN
Absolute input voltage AIN
X
- GND –0.1 AVDD + 0.1 V
TEMPERATURE RANGE
T
A
Ambient temperature –40 25 85 ℃
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.4 Thermal Information
THERMAL METRIC
(1)
TLA2528
UNITRTE (WQFN)
16 PINS
R
θJA
Junction-to-ambient thermal resistance 49.7 °C/W
R
θJC(top)
Junction-to-case (top) thermal resistance 53.4 °C/W
R
θJB
Junction-to-board thermal resistance 24.7 °C/W
Ψ
JT
Junction-to-top characterization parameter 1.3 °C/W
Ψ
JB
Junction-to-board characterization parameter 24.7 °C/W
R
θJC(bot)
Junction-to-case (bottom) thermal resistance 9.3 °C/W
ADVANCEINFORMATION
5
TLA2528
www.ti.com.cn
ZHCSJS9 –MAY 2019
Copyright © 2019, Texas Instruments Incorporated
6.5 Electrical Characteristics
at AVDD = 5 V, DVDD = 1.65 V to 5.5 V, and maximum throughput (unless otherwise noted); minimum and maximum values
at T
A
= –40°C to +85°C; typical values at T
A
= 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUTS
C
SH
Sampling capacitance 12 pF
DC PERFORMANCE
Resolution No missing codes 12 bits
DNL Differential nonlinearity ±0.3 LSB
INL Integral nonlinearity ±0.5 LSB
V
(OS)
Input offset error Post offset calibration ±0.5 LSB
Input offset thermal drift Post offset calibration ±5 ppm/°C
G
E
Gain error ±0.05 %FSR
Gain error thermal drift ±5 ppm/°C
AC PERFORMANCE
SINAD Signal-to-noise + distortion ratio
AVDD = 5 V, f
IN
= 2 kHz 71.5
dB
AVDD = 3 V, f
IN
= 2 kHz 70.5
DECAP Pin
Decoupling capacitor on DECAP
pin
0.22 1 µF
DIGITAL INPUT/OUTPUT (SCL, SDA)
V
IH
Input high logic level All I
2
C modes 0.7 x DVDD 5.5 V
V
IL
Input low logic level All I
2
C modes –0.3 0.3 x DVDD V
V
OL
Output low logic level
Sink current = 2 mA, DVDD > 2 V 0 0.4
V
Sink current = 2 mA, DVDD ≤ 2 V 0 0.2 x DVDD
I
OL
Low-level output current (sink)
V
OL
= 0.4 V, standard and fast
mode
3
mA
V
OL
= 0.6 V, fast mode 6
V
OL
= 0.4 V, fast mode plus 20
GPIOs
V
IH
Input high logic level 0.7 x AVDD AVDD + 0.3 V
V
IL
Input low logic level –0.3 0.3 x AVDD V
V
OH
Output high logic level
GPO_DRIVE_CFG = push-pull,
I
SOURCE
= 2 mA
0.8 x AVDD AVDD V
V
OL
Output low logic level I
SINK
= 2 mA 0 0.2 x AVDD V
I
OH
Output high source current V
OH
> 0.7 x AVDD 5 mA
I
OL
Output low sink current V
OL
< 0.3 x AVDD 5 mA
POWER SUPPLY CURRENTS
I
AVDD
Analog supply current
I
2
C high-speed mode, AVDD = 5 V 260
µA
I
2
C fast mode plus, AVDD = 5 V 83
I
2
C fast mode, AVDD = 5 V 35
I
2
C standard mode, AVDD = 5 V 10
No conversion, AVDD = 5 V 5
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