TI-TLA2518.pdf资源-CSDN文库

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Example ApplicationsDevice Block Diagram

ADC

MUX

Programmable

Averaging Filters

SPI Interface

AVDD

GND

DVDD

DECAP

Controller

TLA2518

SPI

AVDD (V

REF

)

AIN / GPIO

SIGNAL

+ noise

Reduced

noise

TLA2518

Averaging

Filters

Controller

TLA2518

SCLK

SDO

SDI

AIN0 / GPIO0

AIN1 / GPIO1

AIN2 / GPIO2

AIN3 / GPIO3

AIN4 / GPIO4

AIN5 / GPIO5

AIN6 / GPIO6

AIN7 / GPIO7

GPO Write

GPI Read

Pin CFG

Sequencer

Product

Folder

Order

Now

Technical

Documents

Tools &

Software

Support &

Community

本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确

性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SBAS980

TLA2518

ZHCSJX7A –JUNE 2019–REVISED DECEMBER 2019

具具有有 SPI 接接口口和和 GPIO 的的 TLA2518 小小型型 8 通通道道 12 位位 ADC

1 特特性性

• 小封装尺寸：

– WQFN 3mm × 3mm

• 8 通道，可配置为以下任意组合：

– 最多 8 个模拟输入、数字输入或数字输出

• 用于 I/O 扩展的 GPIO：

– 开漏、推挽数字输出

• 宽工作范围：

– AVDD：2.35V 至 5.5V

– DVDD：1.65V 至 5.5V

– 温度范围：-40°C 至 +85°C

• 增强型 SPI 数字接口：

– 高速 60MHz 接口

– 使用 >13.5MHz SPI 实现最大吞吐量

• 可编程均值滤波器:

– 用于求平均值的可编程样本大小

– 利用内部转换求平均值

– 16 位分辨率

2 应应用用

• 宏远程无线电单元 (RRU)

• 电池管理系统 (BMS)

• 串式逆变器

• 中央逆变器

3 说说明明

TLA2518 是一款易于使用的 8 通道多路复用 12 位

1MSPS 逐次逼近寄存器模数转换器 (SAR ADC)。8 个

通道可独立配置为模拟输入、数字输入或数字输出。

该器件具有一个用于执行 ADC 转换过程的内部振荡

器。

TLA2518 通过兼容 SPI 的接口进行通信，并支持通过

单次转换启动对多个数据样本求平均值。内置的可编程

平均滤波器有助于降低来自模拟输入的噪声，并减少主

机需要读取的数据样本数量。

器器件件信信息息

(1)

器器件件型型号号封封装装封封装装尺尺寸寸（（标标称称值值））

TLA2518 WQFN (16) 3.00mm × 3.00mm

(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附

录。

TLA2518 方方框框图图和和应应用用

TLA2518

ZHCSJX7A –JUNE 2019–REVISED DECEMBER 2019

www.ti.com.cn

目目录录

1 特特性性.......................................................................... 1

2 应应用用.......................................................................... 1

3 说说明明.......................................................................... 1

4 修修订订历历史史记记录录 ........................................................... 2

5 Pin Configuration and Functions......................... 3

6 Specifications......................................................... 4

6.1 Absolute Maximum Ratings ...................................... 4

6.2 ESD Ratings.............................................................. 4

6.3 Recommended Operating Conditions....................... 4

6.4 Thermal Information.................................................. 4

6.5 Electrical Characteristics........................................... 5

6.6 Timing Requirements................................................ 5

6.7 Switching Characteristics.......................................... 6

6.8 Typical Characteristics.............................................. 8

7 Detailed Description............................................ 12

7.1 Overview ................................................................. 12

7.2 Functional Block Diagram ....................................... 12

7.3 Feature Description................................................. 13

7.4 Device Functional Modes........................................ 19

7.5 TLA2518 Registers ................................................. 22

8 Application and Implementation ........................ 29

8.1 Application Information............................................ 29

8.2 Typical Applications ................................................ 29

9 Power Supply Recommendations...................... 32

9.1 AVDD and DVDD Supply Recommendations......... 32

10 Layout................................................................... 33

10.1 Layout Guidelines ................................................. 33

10.2 Layout Example .................................................... 33

11 器器件件和和文文档档支支持持 ..................................................... 34

11.1 接收文档更新通知 ................................................. 34

11.2 社区资源................................................................ 34

11.3 商标 ....................................................................... 34

11.4 静电放电警告......................................................... 34

11.5 Glossary................................................................ 34

12 机机械械、、封封装装和和可可订订购购信信息息....................................... 34

4 修修订订历历史史记记录录

注：之前版本的页码可能与当前版本有所不同。

Changes from Original (June 2019) to Revision A Page

• 已更改将器件状态从“预告信息”更改为“生产数据”.................................................................................................................. 1

16 AIN1/GPIO15AIN6/GPIO6

1AIN2/GPIO2 12 SDO

15 AIN0/GPIO06AIN7/GPIO7

2AIN3/GPIO3 11 CS

14 SDI7AVDD

3AIN4/GPIO4 10 DVDD

13 SCLK8DECAP

4AIN5/GPIO5 9 GND

Not to scale

Thermal

Pad

TLA2518

www.ti.com.cn

ZHCSJX7A –JUNE 2019–REVISED DECEMBER 2019

5 Pin Configuration and Functions

RTE Package

16-Pin WQFN

Top View

(1) AI = analog input, DI = digital input, and DO = digital output.

Pin Functions

FUNCTION

(1)

DESCRIPTION

NAME NO.

AIN0/GPIO0 15 AI, DI, DO Channel 0; can be configured as either an analog input (default), digital input, or digital output.

AIN1/GPIO1 16 AI, DI, DO Channel 1; can be configured as either an analog input (default), digital input, or digital output.

AIN2/GPIO2 1 AI, DI, DO Channel 2; can be configured as either an analog input (default), digital input, or digital output.

AIN3/GPIO3 2 AI, DI, DO Channel 3; can be configured as either an analog input (default), digital input, or digital output.

AIN4/GPIO4 3 AI, DI, DO Channel 4; can be configured as either an analog input (default), digital input, or digital output.

AIN5/GPIO5 4 AI, DI, DO Channel 5; can be configured as either an analog input (default), digital input, or digital output.

AIN6/GPIO6 5 AI, DI, DO Channel 6; can be configured as either an analog input (default), digital input, or digital output.

AIN7/GPIO7 6 AI, DI, DO Channel 7; can be configured as either an analog input (default), digital input, or digital output.

AVDD 7 Supply

Analog supply input, also used as the reference voltage to the ADC; connect a 1-µF

decoupling capacitor to GND.

CS 11 DI

Chip-select input pin; active low. The device takes control of the data bus when CS is low.

The device starts converting the active input channel on the rising edge of CS. SDO goes hi-Z

when CS is high.

DECAP 8 Supply Connect a decoupling capacitor to this pin for the internal power supply.

DVDD 10 Supply Digital I/O supply voltage; connect a 1-µF decoupling capacitor to GND.

GND 9 Supply Ground for the power supply; all analog and digital signals are referred to this pin voltage.

SCLK 13 DI Serial clock for the SPI interface.

SDI 14 DI Serial data in for the device.

SDO 12 DO Serial data out for the device.

Thermal pad — Supply Exposed thermal pad; connect to GND.

TLA2518

ZHCSJX7A –JUNE 2019–REVISED DECEMBER 2019

www.ti.com.cn

(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) AINx / GPIOx refers to pins 1, 2, 3, 4, 5, 6, 15, and 16.

(3) Pin current must be limited to 10mA or less.

6 Specifications

6.1 Absolute Maximum Ratings

over operating ambient temperature range (unless otherwise noted)

(1)

MIN MAX UNIT

DVDD to GND –0.3 5.5 V

AVDD to GND –0.3 5.5 V

AINx / GPOx

(2)

to GND GND – 0.3 AVDD + 0.3 V

Digital input to GND GND – 0.3 5.5 V

Current through any pin except supply pins

(3)

–10 10 mA

Junction temperature, T

–40 125 °C

Storage temperature, T

stg

–60 150 °C

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE UNIT

(ESD)

Electrostatic discharge

Human body model (HBM), per

ANSI/ESDA/JEDEC JS-001, all pins

(1)

±2000

Charged device model (CDM), per JEDEC

specification JESD22-C101, all pins

(2)

±500

(1) AINx refers to AIN0, AIN1, AIN2, AIN3, AIN4, AIN5, AIN6, and AIN7.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

(1)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

POWER SUPPLY

AVDD Analog supply voltage 2.35 3.3 5.5 V

DVDD Digital supply voltage 1.65 3.3 5.5 V

ANALOG INPUTS

FSR Full-scale input range AIN

- GND 0 AVDD V

Absolute input voltage AIN

- GND –0.1 AVDD + 0.1 V

TEMPERATURE RANGE

Ambient temperature –40 25 85 ℃

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

6.4 Thermal Information

THERMAL METRIC

(1)

TLA2518

UNITRTE (WQFN)

16 PINS

θJA

Junction-to-ambient thermal resistance 49.7 °C/W

θJC(top)

Junction-to-case (top) thermal resistance 53.4 °C/W

θJB

Junction-to-board thermal resistance 24.7 °C/W

Junction-to-top characterization parameter 1.3 °C/W

Junction-to-board characterization parameter 24.7 °C/W

θJC(bot)

Junction-to-case (bottom) thermal resistance 9.3 °C/W

TLA2518

www.ti.com.cn

ZHCSJX7A –JUNE 2019–REVISED DECEMBER 2019

6.5 Electrical Characteristics

at AVDD = 5 V, DVDD = 1.65 V to 5.5 V, and maximum throughput (unless otherwise noted); minimum and maximum values

at T

= –40°C to +85°C; typical values at T

= 25°C

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

ANALOG INPUTS

Sampling capacitance 12 pF

DC PERFORMANCE

Resolution No missing codes 12 bits

DNL Differential nonlinearity ±0.3 LSB

INL Integral nonlinearity ±0.5 LSB

(OS)

Input offset error Post offset calibration ±0.5 LSB

Input offset thermal drift Post offset calibration ±5 ppm/°C

Gain error ±0.05 %FSR

Gain error thermal drift ±5 ppm/°C

AC PERFORMANCE

SINAD Signal-to-noise + distortion ratio

AVDD = 5 V, f

= 2 kHz 71.5 dB

AVDD = 3 V, f

= 2 kHz 70.5 dB

DECAP Pin

Decoupling capacitor on DECAP

0.1 1 µF

SPI INTERFACE (CS, SCLK, SDI, SDO)

Input high logic level 0.7 x DVDD 5.5 V

Input low logic level –0.3 0.3 x DVDD V

Output high logic level

Source current = 2 mA,

DVDD > 2 V

0.8 x DVDD DVDD

Source current = 2 mA,

DVDD ≤ 2 V

0.7 x DVDD DVDD

Output low logic level

Sink current = 2 mA, DVDD > 2 V 0 0.4

Sink current = 2 mA, DVDD ≤ 2 V 0 0.2 x DVDD

GPIOs

Input high logic level 0.7 x AVDD AVDD + 0.3 V

Input low logic level –0.3 0.3 x AVDD V

Output high logic level

GPO_DRIVE_CFG = push-pull,

SOURCE

= 2 mA

0.8 x AVDD AVDD V

Output low logic level I

SINK

= 2 mA 0 0.2 x AVDD V

Output high source current V

> 0.7 x AVDD 5 mA

Output low sink current V

< 0.3 x AVDD 5 mA

POWER-SUPPLY CURRENTS

AVDD

Analog supply current

Full throughput, AVDD = 5 V 470 600

µAFull throughput, AVDD = 3 V 440 550

No conversion, AVDD = 5 V 10 25

6.6 Timing Requirements

at AVDD = 5 V, DVDD = 1.65 V to 5.5 V, and maximum throughput (unless otherwise noted); minimum and maximum values

at T

= –40°C to +85°C; typical values at T

= 25°C

MIN MAX UNIT

CONVERSION CYCLE

CYCLE

Sampling frequency 1000 kSPS

CYCLE

ADC cycle-time period 1 / f

CYCLE

ACQ

Acquisition time 300 ns

QT_ACQ

Quiet acquisition time 10 ns

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