TI-TPS71202-EP.pdf资源-CSDN文库

需积分: 9 90 浏览量 2022-10-28 23:50:52 上传评论 5 收藏 1.41MB PDF 举报

资源推荐

资源详情

资源评论

 

    

TPS71202-EP

www.ti.com

SGLS395A –OCTOBER 2008–REVISED SEPTEMBER 2010

DUAL, 250-mA OUTPUT, ULTRA-LOW NOISE, HIGH PSRR, LOW-DROPOUT

LINEAR REGULATOR

Check for Samples: TPS71202-EP

FEATURES

SUPPORTS DEFENSE, AEROSPACE,

AND MEDICAL APPLICATIONS

• Dual 250-mA High-Performance RF LDOs

• Controlled Baseline

• Adjustable Output Voltage (1.2 V to 5.5 V)

• One Assembly/Test Site

• High PSRR: 65 dB at 10 kHz

• One Fabrication Site

• Ultra-Low Noise: 32 mVrms

• Available in Military (–55°C/125°C)

• Fast Start-Up Time: 60 ms

Temperature Range

(1)

• Stable with 2.2-mF Ceramic Capacitor

• Extended Product Life Cycle

• Excellent Load/Line Transient Response

• Extended Product-Change Notification

• Very Low Dropout Voltage: 125 mV at 250 mA

• Product Traceability

DESCRIPTION

• Independent Enable Pins

• Thermal Shutdown and Independent Current

The TPS71202 low-dropout (LDO) voltage regulator

Limit

is tailored to noise-sensitive and RF applications. It

features dual 250-mA LDOs with ultra-low noise, high

• Available in Thermally-Enhanced SON

power-supply rejection ratio (PSRR), and fast

Package: 3 mm × 3 mm × 1 mm

transient and start-up response. Each regulator

output is stable with low-cost 2.2-mF ceramic output

APPLICATIONS

capacitors and features very low dropout voltages

• Cellular and Cordless Phones

(125 mV typical at 250 mA). The regulator achieves

• Wireless PDA/Handheld Products

fast start-up times (approximately 60 ms with a

0.001-mF bypass capacitor) while consuming very low

• PCMCIA/Wireless LAN Applications

quiescent current (300 mA typical with both outputs

• Digital Camera/Camcorder/Internet Audio

enabled). When the device is placed in standby

• DSP/FPGA/ASIC/Controllers and Processors

mode, the supply current is reduced to less than

0.3 mA typical. The regulator exhibits approximately

32 mVrms of output voltage noise with V

OUT

= 2.8 V

and a 0.01-mF noise reduction (NR) capacitor.

Applications with analog components that are

noise-sensitive, such as portable RF electronics,

benefit from high PSRR, low noise, and fast line and

load transient features. The TPS71202 is offered in a

thin 3-mm × 3-mm SON package and is fully

specified from –55°C to 125°C (T

(1) Custom temperature ranges available

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

On products compliant to MIL-PRF-38535, all parameters are

Instruments standard warranty. Production processing does not

tested unless otherwise noted. On all other products, production

necessarily include testing of all parameters.

processing does not necessarily include testing of all parameters.

EN1

FB1

EN2

FB2

OUT1

OUT2

GND

DRC PACKAGE

3-mm y 3-mm SON

(TOP VIEW)

PSRR (dB)

10 100 1k 10k 100k 1M 10M

Frequency (Hz)

PSRR (RIPPLE REJECTION) vs FREQUENCY

OUT

= 2.8 V

OUT

= 2.2

= 0.01

OUT

= 1 mA

OUT

= 250 mA

TPS71202-EP

SGLS395A –OCTOBER 2008–REVISED SEPTEMBER 2010

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ORDERING INFORMATION

(1)

PACKAGE

(2)

ORDERABLE PART NUMBER TOP-SIDE MARKING

–55°C to 125°C SON-10 – DRC Reel of 250 TPS71202MDRCTEP CVQ

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

ABSOLUTE MAXIMUM RATINGS

over operating junction temperature range unless otherwise noted

(1)

Input voltage range IN –0.3 V to 6 V

EN1

Input voltage range EN1, EN2 –0.3 V to V

+ 0.3 V

EN2

OUT

Output voltage range OUT –0.3 V to 6 V

Peak output current Internally limited

Output short-circuit duration Indefinite

Continuous total power dissipation See Thermal Information table

Junction temperature range –55°C to 150°C

Storage temperature range –65°C to 150°C

Human-Body Model (HBM) 2000 V

ESD Electrostatic discharge rating

Charged-Device Model (CDM) 500 V

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under the Electrical Characteristics

is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.

Product Folder Link(s): TPS71202-EP

TPS71202-EP

www.ti.com

SGLS395A –OCTOBER 2008–REVISED SEPTEMBER 2010

THERMAL INFORMATION

TPS71202-EP

THERMAL METRIC

(1)(2)

UNITS

DRC (10 PINS)

Junction-to-ambient thermal resistance 49.6

JCtop

Junction-to-case (top) thermal resistance 70.0

Junction-to-board thermal resistance 17.8

°C/W

Junction-to-top characterization parameter 0.6

Junction-to-board characterization parameter 15.2

JCbot

Junction-to-case (bottom) thermal resistance 5.2

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.

ELECTRICAL CHARACTERISTICS

over operating temperature range (T

= –55°C to +125°C), V

= highest (V

OUT(nom)

+ 1 V) or 2.7 V (whichever is greater),

OUT

= 1 mA, V

EN1, 2

= 1.2 V, C

OUT

= 10 mF, C

= 0.01 mF, and adjustable LDOs are tested at V

OUT

= 3.0 V (unless otherwise

noted). Typical values are at T

= 25°C.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Input voltage range

(1)

2.7 5.5 V

Internal reference (adjustable LDOs) 1.200 1.225 1.250 V

Output voltage range

5.5 – V

(adjustable LDOs)

Nominal T

= +25°C, I

OUT

= 0 mA –1.5 +1.5

OUT

Over V

Accuracy

(1)

OUT

, and V

OUT

+ 1.0 V ≤ V

≤ 5.5 V,

–3 1 +3

temperatur 0 mA ≤ I

OUT

≤ 250 mA

ΔV

OUT

%/ΔV

Line regulation

(1)

OUT

+ 1.0 V ≤ V

≤ 5.5 V 0.05 %/V

ΔV

OUT

%/ΔI

Load regulation 0 mA ≤ I

OUT

≤ 250 mA 0.8 %/mA

Dropout voltage

OUT1

= I

OUT2

= 250 mA 125 315 mV

= V

OUT(nom)

– 0.1V)

Output current limit V

OUT

= 0.9 × V

OUT(nom)

400 600 800 mA

One LDO

OUT

= 1 mA (enabled channel) 190 250

enabled

GND

Ground pin current mA

Both LDOs

OUT1

= I

OUT2

= 1 mA to 250 mA 300 600

enabled

SHDN

Shutdown current

(2)

≤ 0.4 V, 0 V ≤ V

≤ 5.5 V 0.3 2.0 mA

FB pin current 0.1 1.50 mA

No C

, I

OUT

= 250 mA 80.0 × V

OUT

Output noise voltage,

mVrms

BW = 10 Hz to 100 kHz

= 0.01 mF, I

OUT

= 250 mA 11.8 × V

OUT

f = 100 Hz, I

OUT

= 250 mA 65

Power-supply rejection ratio

PSRR dB

(ripple rejection)

f = 10 kHz, I

OUT

= 250 mA 65

STR

Startup time V

OUT

= 2.85 V, R

= 30Ω, C

= 0.001 mF 60 ms

Enable threshold high (EN1, EN2) 1.2 V

Enable threshold low (EN1, EN2) 0 0.4 V

Enable pin current (EN1, EN2) V

= V

= 5.5 V –1 1 mA

Shutdown Temp increasing +160

Thermal shutdown temperature °C

Reset Temp decreasing +140

Undervoltage lockout threshold V

rising 2.25 2.65 V

UVLO

Undervoltage lockout hysteresis V

falling 100 mV

(1) Minimum V

= (V

OUT

+ V

) or 2.7 V, whichever is greater.

(2) For the adjustable version, this applies only after V

is applied; then V

transitions from high to low.

Product Folder Link(s): TPS71202-EP

剩余19页未读，继续阅读

评论收藏

内容反馈

不觉明了

粉丝: 3164
资源: 5429

TI-TPS71202-EP.pdf

TI-SN74CBTLV3257-EP.pdf

TI-SN74LVTH32374-EP.pdf

TI-SN65LVDS95-EP.pdf

TI-SN74ALVCH16245-EP.pdf

TI-SN74LVTH16652-EP.pdf

TI-TPS92663A-Q1.pdf

TI-TPS51200A-Q1.pdf

TI-TPS92662A-Q1.pdf

TI-TPS92515AHV-Q1.pdf

TI-SN74LVTH245A-EP.pdf

TI-SN74LVTH16543-EP.pdf

TI-CDCLVP111-EP.pdf

TI-TSB82AF15-EP.pdf

TI-OPA3S2859-EP.pdf

TI-TPS2561A-Q1.pdf

TI-TPS2513A-Q1.pdf

TI-TPS7A4001-DIE.pdf

TI-TPS25810A-Q1.pdf

TI-DRV401-EP.pdf

TI-INA159-EP.pdf

TI-INA190-EP.pdf

TI-INA2134-EP.pdf

TI-TLV2556-EP.pdf

TI-TPS7B7701-Q1.pdf

TI-TPS51116-EP.pdf

TI-TPS51200-EP.pdf

TI-TPS51216-EP.pdf

TI-TPS75003-EP.pdf

最新资源