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TI-TL594.pdf
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GND
REF
V
CC
Reference
Regulator
C1
Pulse-Steering
Flip-Flop
C1
1D
FEEDBACK
DTC
CT
RT
PWM
Comparator
Error Amplifier 2
1
+
í
Error Amplifier 1
0.1 V
DTC
Comparator
Oscillator
OUTPUT CTRL
(see Function Table)
0.7 mA
E1
C2
E2
2
+
í
Undervoltage
Lockout
Control
IN+
INí
IN+
INí
6
5
1
2
16
15
3
14
7
12
10
11
9
8
13
4
Copyright © 2016, Texas Instruments Incorporated
Product
Folder
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Buy
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Software
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Community
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TL594
SLVS052I –APRIL 1988–REVISED SEPTEMBER 2016
TL594 Pulse-Width-Modulation Control Circuit
1
1 Features
1
• Complete PWM Power-Control Circuitry
• Uncommitted Outputs for 200-mA Sink or Source
Current
• Output Control Selects Single-Ended or Push-Pull
Operation
• Internal Circuitry Prohibits Double Pulse at Either
Output
• Variable Dead Time Provides Control Over Total
Range
• Internal Regulator Provides a Stable 5-V
Reference Supply Trimmed to 1%
• Circuit Architecture Allows Easy Synchronization
• Undervoltage Lockout (UVLO) for Low-V
CC
Conditions
2 Applications
• White Goods
• Power Supplies: AC/DC, Isolated,
With PFC, > 90 W
• Server PSUs
• Solar Micro-Inverters
• Power Supplies: AC/DC, Isolated,
No PFC, < 90 W
• Power: Telecom/Server AC/DC Supplies
• Solar Power Inverters
3 Description
The TL594 device incorporates all the functions
required in the construction of a pulse-width-
modulation (PWM) control circuit on a single chip.
Designed primarily for power-supply control, this
device offers the systems engineer the flexibility to
tailor the power-supply control circuitry to a specific
application.
The TL594 device contains two error amplifiers, an
on-chip adjustable oscillator, a dead-time control
(DTC) comparator, a pulse-steering control flip-flop, a
5-V regulator with a precision of 1%, an undervoltage
lockout control circuit, and output control circuitry.
The uncommitted output transistors provide either
common-emitter or emitter-follower output capability.
Each device provides for push-pull or single-ended
output operation, with selection by means of the
output-control function. The architecture of these
devices prohibits the possibility of either output being
pulsed twice during push-pull operation. The
undervoltage lockout control circuit locks the outputs
off until the internal circuitry is operational.
Device Information
PART NUMBER PACKAGE BODY SIZE (NOM)
TL594D SOIC (16) 9.90 mm × 3.91 mm
TL594N PDIP (16) 19.30 mm × 6.35 mm
TL594NS SO (16) 10.30 mm × 5.30 mm
TL594PW TSSOP (16) 5.00 mm × 4.40 mm
Block Diagram
For OUTPUT CTRL function, see Table 1.
2
TL594
SLVS052I –APRIL 1988–REVISED SEPTEMBER 2016
www.ti.com
Product Folder Links: TL594
Submit Documentation Feedback Copyright © 1988–2016, Texas Instruments Incorporated
Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings ............................................................ 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information ................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Switching Characteristics.......................................... 6
6.7 Typical Characteristics.............................................. 6
7 Parameter Measurement Information .................. 7
8 Detailed Description.............................................. 9
8.1 Overview .................................................................. 9
8.2 Functional Block Diagram ......................................... 9
8.3 Feature Description ................................................ 10
8.4 Device Functional Modes ....................................... 12
9 Application and Implementation ........................ 13
9.1 Application Information............................................ 13
9.2 Typical Application .................................................. 13
10 Power Supply Recommendations ..................... 19
11 Layout................................................................... 19
11.1 Layout Guidelines ................................................. 19
11.2 Layout Example .................................................... 20
12 Device and Documentation Support ................. 21
12.1 Documentation Support ........................................ 21
12.2 Receiving Notification of Documentation Updates 21
12.3 Community Resources.......................................... 21
12.4 Trademarks ........................................................... 21
12.5 Electrostatic Discharge Caution............................ 21
12.6 Glossary ................................................................ 21
13 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision H (January 2014) to Revision I Page
• Added Applications section, ESD Ratings table, Feature Description section, Device Functional Modes, Application
and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section................................................................ 1
• Changed values in the Thermal Information table from 73 to 73.5 (D), from 67 to 43.5 (N), from 64 to 73.6 (NS), and
from 108 to 101.5 (PW) .......................................................................................................................................................... 4
Changes from Revision G (January 2007) to Revision H Page
• Deleted Ordering Information table; see POA at the end of the data sheet........................................................................... 1
• Updated document to new TI data sheet format - no specific changes................................................................................. 1
• Added ESD warning ............................................................................................................................................................... 1
11IN+ 16 2IN+
21IN± 15 2IN±
3FEEDBACK 14 REF
4DTC 13 OUTPUT CTRL
5CT 12 VCC
6RT 11 C2
7GND 10 E2
8C1 9 E1
Not to scale
3
TL594
www.ti.com
SLVS052I –APRIL 1988–REVISED SEPTEMBER 2016
Product Folder Links: TL594
Submit Documentation FeedbackCopyright © 1988–2016, Texas Instruments Incorporated
5 Pin Configuration and Functions
D, N, NS, or PW Package
16-Pin SOIC, PDIP, SO, or TSSOP
Top View
Pin Functions
PIN
I/O DESCRIPTION
NO. NAME
1 1IN+ I Noninverting input to error amplifier 1
2 1IN– I Inverting input to error amplifier 1
3 FEEDBACK I Input pin for feedback
4 DTC I Dead-time control comparator input
5 CT — Capacitor terminal used to set oscillator frequency
6 RT — Resistor terminal used to set oscillator frequency
7 GND — Ground
8 C1 O Collector terminal of BJT output 1
9 E1 O Emitter terminal of BJT output 1
10 E2 O Emitter terminal of BJT output 2
11 C2 O Collector terminal of BJT output 2
12 V
CC
— Positive supply
13 OUTPUT CTRL I Selects single-ended, parallel output, or push-pull operation
14 REF O 5-V reference regulator output
15 2IN– I Inverting input to error amplifier 2
16 2IN+ I Noninverting input to error amplifier 2
4
TL594
SLVS052I –APRIL 1988–REVISED SEPTEMBER 2016
www.ti.com
Product Folder Links: TL594
Submit Documentation Feedback Copyright © 1988–2016, Texas Instruments Incorporated
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to the network ground terminal.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN MAX UNIT
Supply voltage, V
CC
(2)
41 V
Amplifier input voltage V
CC
+ 0.3 V
Collector output voltage 41 V
Collector output current 250 mA
Operating junction temperature, T
J
150 °C
Storage temperature, T
stg
–65 150 °C
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings
VALUE UNIT
V
(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
1000
V
Charged-device model (CDM), per JEDEC specification JESD22-C101
(2)
1000
6.3 Recommended Operating Conditions
MIN MAX UNIT
V
CC
Supply voltage 7 40 V
V
I
Amplifier input voltage –0.3 V
CC
– 2 V
V
O
Collector output voltage 40 V
Collector output current (each transistor) 200 mA
Current into FEEDBACK terminal 0.3 mA
C
T
Timing capacitor 0.47 10000 nF
R
T
Timing resistor 1.8 500 kΩ
f
osc
Oscillator frequency 1 300 kHz
T
A
Operating free-air temperature
TL594C 0 70
°C
TL594I –40 85
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.4 Thermal Information
THERMAL METRIC
(1)
TL594
UNITD (SOIC) N (PDIP) NS (SO) PW (TSSOP)
16 PINS 16 PINS 16 PINS 16 PINS
R
θJA
Junction-to-ambient thermal resistance 73.5 43.5 73.6 101.5 °C/W
R
θJC(top)
Junction-to-case (top) thermal resistance 32.8 30.6 30.3 29.4 °C/W
R
θJB
Junction-to-board thermal resistance 30.8 23.5 34.4 47.3 °C/W
ψ
JT
Junction-to-top characterization parameter 6.1 15.3 3.4 1.4 °C/W
ψ
JB
Junction-to-board characterization parameter 30.6 23.4 34.1 46.6 ° C/W
=
-
s =
-
å
N
2
n
n 1
(X X)
N 1
5
TL594
www.ti.com
SLVS052I –APRIL 1988–REVISED SEPTEMBER 2016
Product Folder Links: TL594
Submit Documentation FeedbackCopyright © 1988–2016, Texas Instruments Incorporated
(1) For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
(2) All typical values, except for parameter changes with temperature, are at T
A
= 25°C.
(3) Duration of the short circuit must not exceed one second.
(4) Standard deviation is a measure of the statistical distribution about the mean, as derived from the formula:
(5) Temperature coefficient of timing capacitor and timing resistor is not taken into account.
6.5 Electrical Characteristics
V
CC
= 15 V, over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS
(1)
MIN TYP
(2)
MAX UNIT
REFERENCE
Output voltage (REF) I
O
= 1 mA, T
A
= 25°C 4.95 5 5.05 V
Input regulation V
CC
= 7 V to 40 V, T
A
= 25°C 2 25 mV
Output regulation I
O
= 1 mA to 10 mA, T
A
= 25°C 14 35 mV
Output-voltage change with temperature ΔT
A
= MIN to MAX 2 10 mV/V
Short-circuit output current
(3)
V
ref
= 0 10 35 50 mA
AMPLIFIER (SEE Figure 3)
Input offset voltage, error amplifier FEEDBACK = 2.5 V 2 10 mV
Input offset current FEEDBACK = 2.5 V 25 250 nA
Input bias current FEEDBACK = 2.5 V 0.2 1 µA
Common mode input voltage,
error amplifier
V
CC
= 7 V to 40 V
0.3 to
V
CC
– 2
V
Open-loop voltage amplification,
error amplifier
ΔV
O
= 3 V, R
L
= 2 kΩ, V
O
= 0.5 V to 3.5 V 70 95 dB
Unity-gain bandwidth V
O
= 0.5 V to 3.5 V, R
L
= 2 kΩ 800 kHz
Common mode rejection ratio,
error amplifier
V
CC
= 40 V, T
A
= 25°C 65 80 dB
Output sink current, FEEDBACK V
ID
= –15 mV to –5 V, FEEDBACK = 0.5 V 0.3 0.7 mA
Output source current, FEEDBACK V
ID
= 15 mV to 5 V, FEEDBACK = 3.5 V –2 mA
OSCILLATOR, C
T
= 0.01 µF, R
T
= 12 kΩ (SEE Figure 4)
Frequency 10 kHz
Standard deviation of frequency
(4)
All values of V
CC
, C
T
, R
T
, and T
A
constant 100 Hz/kHz
Frequency change with voltage V
CC
= 7 V to 40 V, T
A
= 25°C 1 Hz/kHz
Frequency change with temperature
(5)
ΔT
A
= MIN to MAX 50 Hz/kHz
DEAD-TIME CONTROL (SEE Figure 4)
Input bias current V
I
= 0 to 5.25 V –2 –10 µA
Maximum duty cycle, each output DTC = 0 V 0.45
Input threshold voltage
Zero duty cycle 3 3.3
V
Maximum duty cycle 0
OUTPUT
Collector off-state current
V
C
= 40 V, V
E
= 0 V, V
CC
= 40 V 2 100
µA
DTC and OUTPUT CTRL = 0 V, V
C
= 15 V,
V
E
= 0 V, V
CC
= 1 V to 3 V
4 200
Emitter off-state current V
CC
= V
C
= 40 V, V
E
= 0 –100 µA
Collector-emitter saturation voltage
Common emitter, V
E
= 0, I
C
= 200 mA 1.1 1.3
V
Emitter follower, V
C
= 15 V, I
E
= –200 mA 1.5 2.5
Output control input current V
I
= V
ref
3.5 mA
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