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FEATURES APPLICATIONS

DESCRIPTION

110VAC->240VAC

TAS5630

+25V to +50V+12V

PurePath HD

TAS5630

(2.1 Configuration)

PurePath HD

Class G Power Supply

Ref design

3 x OPA1632

±15V

ANALOG

AUDIO

INPUT

♫♪

TAS5630

www.ti.com

...................................................................................................................................................................................................... SLES220 – JUNE 2009

300W STEREO / 600W MONO PurePath™ HD ANALOG-INPUT POWER STAGE

• Mini Combo System

• PurePath™ HD Enabled Integrated Feedback

Provides:

• AV Receivers

• DVD Receivers

– Signal Bandwidth up to 80kHz for High

Frequency Content From HD Sources

• Active Speakers

– Ultralow 0.03% THD at 1W into 4 Ω

– Flat THD at all Frequencies for Natural

Sound

The TAS5630 is a high performance analog input

Class D amplifier with integrated closed loop

– 80dB PSRR (BTL, No Input Signal)

feedback technology (known as PurePath™ HD) with

– >100dB (A weighted) SNR

the ability to drive up to 300W

(1)

Stereo into 4 to 8 Ω

– Click and Pop Free Startup

Speakers from a single 50V supply.

• Multiple Configurations Possible on the Same

PurePath™ HD technology enables traditional

PCB With Stuffing Options:

AB-Amplifier performance ( < 0.03% THD) levels while

– Mono Parallel Bridge Tied Load (PBTL) providing the power efficiency of traditional class D

amplifiers.

– Stereo Bridge Tied Load (BTL)

Unlike traditional Class D amplifiers, the distortion

– 2.1 Single Ended Stereo Pair and Bridge

curve only increases once the output levels move into

Tied Load Subwoofer

clipping. PurePath Premier Pro™Power PAD™

– Quad Single Ended Outputs

PurePath™ HD technology enables lower idle losses

• Total Output Power at 10%THD+N

making the device even more efficient. Coupled with

– 600W in Mono PBTL Configuration

TI ’ s Class G power supply reference design for

– 300W per Channel in Stereo BTL

TAS563x, industry leading levels of efficiency can be

Configuration

achieved.

– 145W per Channel in Quad Single Ended

Configuration

• High Efficiency Power Stage (>88%) With

60-m Ω Output MOSFETs

• Two Thermally Enhanced Package Options:

– PHD (64-Pin QFP)

– DKD (44-Pin PSOP3)

• Self-Protection Design (Including

Undervoltage, Overtemperature, Clipping, and

Short-Circuit Protection) With Error Reporting

• EMI Compliant When Used With

Recommended System Design

(1) Achievable output power levels are dependent on the thermal

configuration of the target application. A high performance

thermal interface material between the package exposed

heatslug and the heat sink should be used to achieve high

output power levels.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 PurePath Premier Pro, Power PAD are trademarks of Texas Instruments.

3 All other trademarks are the property of their respective owners.

UNLESS OTHERWISE NOTED this document contains

PRODUCTION DATA information current as of publication date.

Products conform to specifications per the terms of Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

ABSOLUTE MAXIMUM RATINGS

RECOMMENDED OPERATING CONDITIONS

TAS5630

SLES220 – JUNE 2009 ......................................................................................................................................................................................................

www.ti.com

over operating free-air temperature range unless otherwise noted

(1)

VALUE UNIT

VDD to AGND – 0.3 to 13.2 V

GVDD to AGND – 0.3 to 13.2 V

PVDD_X to GND_X

(2)

– 0.3 to 69 V

OUT_X to GND_X

(2)

– 0.3 to 69 V

BST_X to GND_X

(2)

– 0.3 to 82.2 V

BST_X to GVDD_X

(2)

– 0.3 to 69 V

VREG to AGND – 0.3 to 4.2 V

GND_X to GND – 0.3 to 0.3 V

GND_X to AGND – 0.3 to 0.3 V

OC_ADJ, M1, M2, M3, OSC_IO+, OSC_IO-, FREQ_ADJ, VI_CM, C_STARTUP, PSU_REF – 0.3 to 4.2 V

to AGND

INPUT_X – 0.3 to 5 V

RESET, SD, OTW1, OTW2, CLIP, READY to AGND – 0.3 to 7 V

Continuous sink current ( SD, OTW1, OTW2, CLIP, READY) 9 mA

Operating junction temperature range, T

0 to 150 ° C

Storage temperature, T

stg

– 40 to 150 ° C

Human body model

(3)

(all pins) ± 2 kV

Electrostatic discharge

Charged device model

(3)

(all pins) ± 500 V

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) These voltages represents the DC voltage + peak AC waveform measured at the terminal of the device in all conditions.

(3) Failure to follow good anti-static ESD handling during manufacture and rework will contribute to device malfunction. Please ensure

operators handling the device are adequately grounded through the use of ground straps or alternative ESD protection.

over operating free-air temperature range (unless otherwise noted)

MIN NOM MAX UNIT

PVDD_x Half-bridge supply DC supply voltage 25 50 52.5 V

Supply for logic regulators and gate-drive

GVDD_x DC supply voltage 10.8 12 13.2 V

circuitry

VDD Digital regulator supply voltage DC supply voltage 10.8 12 13.2 V

(BTL) 3.5 4

Output filter according to schematics in

(SE) Load impedance 1.8 2 Ω

the application information section

(PBTL) 1.6 2

OUTPUT

(BTL) 7 10

OUTPUT

(SE) Output filter inductance Minimum output inductance at I

7 15 µ H

OUTPUT

(PBTL) 7 10

Nominal 350 400 450

PWM frame rate selectable for AM

PWM

interference avoidance; 1% Resistor AM1 310 340 350 kHz

tolerance.

AM2 250 300 320

Nominal; Master mode 9.5 10 10.5

FREQ_ADJ

PWM frame rate programming resistor AM1; Master mode 19.8 20 20.2 k Ω

AM2; Master mode 29.7 30 30.3

Voltage on FREQ_ADJ pin for slave mode

FREQ_ADJ

Slave mode 3.3 V

operation

Junction temperature 0 150 ° C

Product Folder Link(s): TAS5630

TAS5630

www.ti.com

PIN FUNCTIONS

Function

(1)

DESCRIPTION

NAME PHD NO. DKD NO.

AGND 8 10 P Analog ground

BST_A 54 43 P HS bootstrap supply (BST), external 0.033 µ F capacitor to OUT_A required.

BST_B 41 34 P HS bootstrap supply (BST), external 0.033 µ F capacitor to OUT_B required.

BST_C 40 33 P HS bootstrap supply (BST), external 0.033 µ F capacitor to OUT_C required.

BST_D 27 24 P HS bootstrap supply (BST), external 0.033 µ F capacitor to OUT_D required.

CLIP 18 — O Clipping warning; open drain; active low

C_STARTUP 3 5 O Startup ramp requires a charging capacitor of 4.7 nF to AGND in BTL mode

FREQ_ADJ 12 14 I PWM frame rate programming pin requires resistor to AGND

7, 23, 24, 57,

GND 9 P Ground

GND_A 48, 49 38 P Power ground for half-bridge A

GND_B 46, 47 37 P Power ground for half-bridge B

GND_C 34, 35 30 P Power ground for half-bridge C

GND_D 32, 33 29 P Power ground for half-bridge D

GVDD_A 55 — P Gate drive voltage supply requires 0.1 µ F capacitor to GND_A

GVDD_B 56 — P Gate drive voltage supply requires 0.1 µ F capacitor to GND_B

GVDD_C 25 — P Gate drive voltage supply requires 0.1 µ F capacitor to GND_C

GVDD_D 26 — P Gate drive voltage supply requires 0.1 µ F capacitor to GND_D

GVDD_AB — 44 P Gate drive voltage supply requires 0.22 µ F capacitor to GND_A/GND_B

GVDD_CD — 23 P Gate drive voltage supply requires 0.22 µ F capacitor to GND_C/GND_D

INPUT_A 4 6 I Input signal for half bridge A

INPUT_B 5 7 I Input signal for half bridge B

INPUT_C 10 12 I Input signal for half bridge C

INPUT_D 11 13 I Input signal for half bridge D

M1 20 20 I Mode selection

M2 21 21 I Mode selection

M3 22 22 I Mode selection

NC 59 – 62 – — No connect, pins may be grounded.

Analog overcurrent programming pin requires resistor to AGND. 64 pin

OC_ADJ 1 3 O

package (PHD) = 22kOhm. 44 pin PSOP3 (DKD) = 24kOhm

OSC_IO+ 13 15 I/O Oscillator master/slave output/input.

OSC_IO – 14 16 I/O Oscillator master/slave output/input.

OTW — 18 O Overtemperature warning signal, open drain, active low.

OTW1 16 — O Overtemperature warning signal, open drain, active low.

OTW2 17 — O Overtemperature warning signal, open drain, active low.

OUT_A 52, 53 39, 40 O Output, half bridge A

OUT_B 44, 45 36 O Output, half bridge B

OUT_C 36, 37 31 O Output, half bridge C

OUT_D 28, 29 27, 28 O Output, half bridge D

PSU_REF 63 1 P PSU Reference requires close decoupling of 330 pF to AGND

Power supply input for half bridges A requires close decoupling of 0.01 µ F

PVDD_A 50, 51 41, 42 P

capacitor in parallel with 2.2 µ F capacitor to GND_A

Power supply input for half bridges B requires close decoupling of 0.01 µ F

PVDD_B 42, 43 35 P

capacitor in parallel with 2.2 µ F capacitor to GND_B

Power supply input for half bridges C requires close decoupling of 0.01 µ F

PVDD_C 38, 39 32 P

capacitor in parallel with 2.2 µ F capacitor to GND_C

(1) I = Input, O = Output, P = Power

Product Folder Link(s): TAS5630

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