tas2563.pdf

TAS2563 6.1-W Boosted Class-D Audio Amplifier With Integrated DSP and IV Sense

1 Features

• Key Features

– 11.5 V, 12-step Look-Ahead Class-H boost

– Integrated DSP

– Full Scale Ultrasonic Output to 40kHz

– 2 PDM Microphone inputs

• Powerful Class-D Audio Amplifier :

– 6.1 W 1% THD+N (4 Ω, 3.6 V)

– Thermal and Over-Current Protection

• Advanced Audio Processing

– Dedicated Real-Time DSP with:

• 10-Band Equalizer

• 3-Band Dynamic EQ

• Dynamic Range Compression

• Psychoacoustic Bass

• Flexible Interfaces and Control :

– I

2

S/TDM: 8 Channels of 32 Bit up to 96 KSPS

– <1uA HW Shutdown VBAT Current

– Boost-Bypass Mode

• Power Supplies and Management

– VBAT: 2.5 V to 5.5 V

– VDD: 1.62 V to 1.95 V

– PVDD: VBAT to 13 V (QFN)

– PVDD: VBAT to 16 V (DSBGA)

– IOVDD: 1.65 V to 3.6 V

– VBAT Tracking Peak Voltage Limiter

– Advanced Brown Out Prevention

3 Description

The TAS2563 is a digital input Class-D audio amplifier

optimized for efficiently driving high peak power into

small loudspeakers. The Class-D amplifier is capable

of delivering 6.1 W of peak power into a 4 Ω load

at battery voltage of 3.6 V using the integrated 11.5V

Class-H boost, or 10W peak power into 4Ω load in

boost bypass mode using external 12V supply.

An on-chip, low-latency DSP supports Texas

Instruments SmartAmp speaker protection algorithms.

The integrated current and voltage sense provide

for real-time monitoring of the loudspeakers, which

TAS2563 also features a boost bypass mode,

supporting supply voltages of up to 16V for even

higher output power.

Two PDM microphone inputs simplify audio signal

chain for two-way audio systems, interfacing digital

microphones with the host processor. A battery

tracking peak voltage limiter with brown-out protection

prevents systems shutdowns by optimizing amplifier

headroom over the entire charge cycle.

Device Information

Simplified Schematic

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

Table of Contents

1 Features............................................................................1

2 Applications..................................................................... 1

3 Description.......................................................................1

4 Revision History.............................................................. 2

6.4 Thermal Information ...................................................7

6.5 Electrical Characteristics ............................................7

6.6 I

C Timing Requirements .........................................14

6.7 SPI Timing Requirements ........................................ 15

6.8 PDM Port Timing Requirements .............................. 15

6.9 TDM Port Timing Requirements ...............................15

6.10 Timing Diagrams.....................................................16

6.11 Typical Characteristics............................................ 18

7 Parameter Measurement Information.......................... 28

8.3 Feature Description...................................................30

8.4 Device Functional Modes..........................................39

8.5 Register Maps...........................................................64

9 Application and Implementation.................................. 95

11.1 Layout Guidelines................................................. 100

11.2 Layout Example.................................................... 101

12 Device and Documentation Support........................105

12.1 Documentation Support........................................ 105

12.2 Receiving Notification of Documentation Updates105

12.3 Support Resources............................................... 105

12.4 Trademarks...........................................................105

12.5 Electrostatic Discharge Caution............................105

12.6 Glossary................................................................105

• Added QFN THDN Isense.................................................................................................................................. 7

• Removed Idle Channel QFN...............................................................................................................................7

• Added Current Consumption with Speaker Protection ON.................................................................................7

• Updated DNR QFN PAckage..............................................................................................................................7

• Updated DNR for Isense and Vsense.................................................................................................................7

• Removed Group Delay....................................................................................................................................... 7

• Updated Captive Load for fast I2C................................................................................................................... 14

• Merged Efficency vs Output Power for both packages.....................................................................................18

• Added AVDD and VBAT Idel Current QFN Package........................................................................................ 18

• Merged Vsense characteristics for both packages........................................................................................... 18

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