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PCI Express Card Electromechanical Specification
October 23, 2024
Revision 6.0 1
PCI Express Card
Electromechanical
Specification
Revision 6.0
October 23, 2024
PCI Express Card Electromechanical Specification
PCI Express Card Electromechanical Specification
October 23, 2024
Revision 6.0 2
PCI-SIG
®
disclaims all warranties and liability for the use of this document and the information contained herein and assumes no
responsibility for any errors that may appear in this document, nor does PCI-SIG make a commitment to update the information
contained herein.
Contact the PCI-SIG office to obtain the latest revision of this specification.
Questions regarding this specification or membership in PCI-SIG may be forwarded to:
Membership Services
www.pcisig.com
E-mail: administration@pcisig.com
Phone: 503-619-0569
Fax: 503-644-6708
Technical Support
techsupp@pcisig.com
DISCLAIMER
This PCI Express Card Electromechanical Specification is provided as is with no warranties whatsoever, including any warranty of
merchantability, non-infringement, fitness for any purpose, or any warranty otherwise arising out of any proposal, specification, or
sample. PCI-SIG disclaims all liability for infringement of proprietary rights, relating to use of information in this specification. No
license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.
PCI Express is a trademark of PCI-SIG.
All other product names are trademarks, registered trademarks, or service marks of their respective owners.
© 2012 - 2024 PCI SIG. All rights reserved.
PCI Express Card Electromechanical Specification
PCI Express Card Electromechanical Specification
October 23, 2024
Revision 6.0 3
Revision
Revision History
Date
1.0
Initial release.
07/22/2002
1.0a
Incorporated WG Errata C1-C7 and E1.
04/15/2003
1.1
Incorporated approved Errata and ECNs.
03/28/2005
2.0
Added support for 5.0 GT/s data rate.
04/11/2007
3.0
• Added support for 8.0 GT/s data rate and incorporated approved Errata and ECNs.
Incorporated the PCI Express x16 Graphics 150W-ATX Specification and the PCI
Express 225 W/300 W High Power Card Electromechanical Specification.
• Re-imported all figures
• Updated Figure 6-1 and Figure 6-3
• Fixed text notes in Chapter 6 and 9 Figures (took notes out of Illustrator and made them
part of the Word file)
• Changed 306.67 MAX dimension to 326.03 MIN in Figure 9-3
07/21/2013
4.0
• Added support for 16.0 GT/s data rate and incorporated approved Errata and ECNs.
• Significant PCB layout updates to support signal integrity
Incorporated the following:
• CEM Comment tracking for 0.7 rev of 4.0 sent 2018 Feb 14, comments updated 03
March:
• 10.12.2017 - Cisco Comments on v0.7 r4.0 CEM, 10.02.2017 draft
• PCIe3 0_CEM_Embedding_Issue_Comm_Rev1_0
• Incorporated new drawings
• CEM Comment tracking for 0.7 rev of 4.0 sent 2018 Feb 14, comments updated 03
March Wig
• Updated drawings for clarity
• Miscellaneous text changes
• Incorporated AMD comments
• Replaced , Figure 11-10, and
• Added Section 2.1.3, Clock Architecture Requirements
• Added Table 2-1. Clocking Architecture Requirements and Table 2-2. Common Clock
Architecture Details
• Updated Acknowledgements section
08/07/2019
PCI Express Card Electromechanical Specification
PCI Express Card Electromechanical Specification
October 23, 2024
Revision 6.0 4
Revision
Revision History
Date
5.0, 1.0
Added support for 600 W, -48 N PCB geometry
• Updated Figure 3-1
• Added Section 6.3.6
• Added Chapter 10, PCI Express 48VHPWR Auxiliary Power Connector Definition
• Added Chapter 9, PCI Express 12V-2x6 Auxiliary Power Connector Definition
• Replaced Sections 11.3 and 11.4.2
• Incorporated Manufacturer Test Mode Pin ECN
• Added Section B.3, 32 GT/s Test Channels
• Incorporated C
in
Maximum Increase ECN.
• Replaced Figure 3-1, Figure 6-5, Figure 11 40, Figure 11-43, Figure 11 43, and
Figure 11 44.
• Updated Table 5-3, Table 5-4, Table 5-7, and Table 5-8
• Added Table 5-9
• Removed reference to the PCI Express Mini Card Electromechanical Specification for
CLKREQ# signal details.
• Added Section 2.9 CLKREQ# Signal (Optional)
• Updated Table 2-9
• Updated Liquid Cooling Enablement section
• Updated Figure 9-1 through Figure 9-8
• Update Figure 6-10 and Figure 6-11
• Created Appendix D, Thermal Management
• Moved Chapter 12 into Appendix D
• Updated Appendix E, Acknowledgements
• Misc update
09/2022
5.1, 1.0
Incorporated following ECNs:
• Power Excursion Limits for 300-600 W PCIE AICs
• CEM_12VHPWR Sideband Allocation and Requirements
• Transmitter_Jitter_Requirements
• Expanding Power Excursion Spec to All Power Levels of PCIe AICs and to CEM
Connector Power Rails
• 12VHPWR Cable Plug Update
• CEM_ECN_Update_to_Transmitter_Jitter_RequirementsECN_Feb10_2023
12V Aux Power Header and Cable Assembly Improvements:
― Increased maximum Add-in Card total power to 675 W
― Moved previous Chapter 9 to new Appendix E, PCI Express 12VHWPR Auxiliary
Power Connector Definition
― Added new Chapter 9, PCI Express 12V-2x6 Auxiliary Power Connector Definitions
• Incorporated edits based on errata dated March 30, 2023.
08/29/2023
6.0
• Added support for 64.0 GT/s.
• Corrected Figure 6-4; removed additional text box.
• Updated Section 6.3.7, Signal Integrity Requirements and Test Procedures for 64.0 GT/s
Support.
• Updated Table 6-9.
08/29/2023,
12/18/2023,
02/05/2024,
09/19/2024
10/02/2024
PCI Express Card Electromechanical Specification
PCI Express Card Electromechanical Specification
October 23, 2024
Revision 6.0 5
Revision
Revision History
Date
• Added Figure 6-15 and Figure 6-16.
• Updated Figure 6-17, Figure 6-18, Figure 6-19, and Figure 6-20.
• Incorporated edits based on errata dated March 30, 2023.
• Added Chapter 13 Link Subdivision.
• Added Appendix F.
• Updated Figure 6-3.
• Updated Figure 9-8.
• Made edits to Chapter 11 to fix updates that were lost between versions.
Updated:
• Fixed editorial items.
• Updated Section 1.5: Electrical Overview.
• Applied errata items from CEM_60_errata_table.docx, April 12, 2024.
• Updated Figures in Section 2.2: PERST# Signal.
• Deleted Section 2.7.3 Flex I/O FRU Descriptor except for Figure 2.7: Example Circuit
Level Diagram of Flex I/O USB 2.0 Alternate Function.
• Updated Figures 6-1, 6-2, 6-3, 6-4, 6-5.
• Updated Figure 9-8: 12V-2x6 Cable Plug Connector Assembly.
• Updated Figures in Chapter 11: Add-in Card Form Factors and Implementation.
• Incorporated 48 V Aux Power Header and Cable Assembly Improvements ECN.
• Incorporated PCI-SIG Form Factor Specification ECN.
10/11/2024
10/23/2024
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