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本文介绍了PCI Express Card Electromechanical Specification Revision 5.0, Version 1.0的内容,该标准于2021年6月9日发布。PCI Express Card Electromechanical Specification是一种用于计算机硬件的标准接口,它定义了PCI Express卡的物理和电气特性,包括插槽、电源、信号传输等方面。PCI Express Card Electromechanical Specification Revision 5.0, Version 1.0是对该标准的更新和完善,旨在提高PCI Express卡的性能和可靠性。
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PCI Express Card Electromechanical Specification
June 9, 2021
Revision 5.0, Version 1.0 1
PCI Express Card
Electromechanical
Specification
Revision 5.0, Version 1.0
June 9, 2021

PCI Express Card Electromechanical Specification
PCI Express Card Electromechanical Specification
June 9, 2021
Revision 5.0, Version 1.0 2
PCI-SIG
®
disclaims all warranties and liability for the use of this document and the information contained herein and assumes no
responsibility for any errors that may appear in this document, nor does PCI-SIG make a commitment to update the information
contained herein.
Contact the PCI-SIG office to obtain the latest revision of this specification.
Questions regarding this specification or membership in PCI-SIG may be forwarded to:
Membership Services
www.pcisig.com
E-mail: administration@pcisig.com
Phone: 503-619-0569
Fax: 503-644-6708
Technical Support
techsupp@pcisig.com
DISCLAIMER
This PCI Express Card Electromechanical Specification is provided as is with no warranties whatsoever, including any warranty of
merchantability, non-infringement, fitness for any purpose, or any warranty otherwise arising out of any proposal, specification, or
sample. PCI-SIG disclaims all liability for infringement of proprietary rights, relating to use of information in this specification. No
license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.
PCI Express is a trademark of PCI-SIG.
All other product names are trademarks, registered trademarks, or service marks of their respective owners.
© 2012 - 2021 PCI SIG. All rights reserved.

PCI Express Card Electromechanical Specification
PCI Express Card Electromechanical Specification
June 9, 2021
Revision 5.0, Version 1.0 3
Revision
Revision History
Date
1.0
Initial release.
7/22/2002
1.0a
Incorporated WG Errata C1-C7 and E1.
4/15/2003
1.1
Incorporated approved Errata and ECNs.
3/28/2005
2.0
Added support for 5.0 GT/s data rate.
4/11/2007
3.0
• Added support for 8.0 GT/s data rate and incorporated approved Errata and ECNs.
Incorporated the PCI Express x16 Graphics 150W-ATX Specification and the PCI Express
225 W/300 W High Power Card Electromechanical Specification.
• Re-imported all figures
• Updated Figure 6-1 and Figure 6-3
• Fixed text notes in Chapter 6 and 9 Figures (took notes out of Illustrator and made them part
of the Word file)
• Changed 306.67 MAX dimension to 326.03 MIN in Figure 9-3
7/21/2013
4.0
• Added support for 16.0 GT/s data rate and incorporated approved Errata and ECNs.
• Significant PCB layout updates to support signal integrity
10/11/2013
4.0 r 0.7
Incorporated the following:
• CEM Comment tracking for 0.7 rev of 4.0 sent 2018 Feb 14, comments updated 03 March:
• 10.12.2017 - Cisco Comments on v0.7 r4.0 CEM, 10.02.2017 draft
• PCIe3 0_CEM_Embedding_Issue_Comm_Rev1_0
• Incorporated new drawings
• CEM Comment tracking for 0.7 rev of 4.0 sent 2018 Feb 14, comments updated 03 March
Wig
03/22/2018
4.0, 0.9
• Updated drawings for clarity
• Miscellaneous text changes
• Incorporated AMD comments
07/10/2019
4.0, 1.0
• Replaced Figure 11-3, Error! Reference source not found., Figure 11-9, and Figure 11-36
• Added Section 2.1.3, Clock Architecture Requirements
• Added Table 2-1. Clocking Architecture Requirements and Table 2-2. Common Clock
Architecture Details
• Updated Achknowledgements Acknowledgements section
Release Candidate
08072019

PCI Express Card Electromechanical Specification
PCI Express Card Electromechanical Specification
June 9, 2021
Revision 5.0, Version 1.0 4
5.0, 1.0
Added support for 600 W, -48 N PCB geometry
• Updated Figure 3-1
• Added Section 6.3.6
• Added Chapter 10, PCI Express 48VHPWR Auxiliary Power Connector Definition
• Added Chapter 9, PCI Express 12VHPWR Auxiliary Power Connector Definition
• Replaced Sections 11.2 and 11.3.2
• Incorporated Manufacturer Test Mode Pin ECN
• Added
• Added Section B.3, 32 GT/s Test Channels
• Incorporated C
in
Maximum Increase ECN.
• Replaced Figure 3-1, Figure 6-5, Dimension Tolerance, unless otherwise specified
is: X.X = ± 0.25 mm, X.XX = ± 0.20 mm
• Figure 9-4, Figure 11 40, Figure 11-22, Figure 11 43, and Figure 11 44.
• Updated Table 5-3, Table 5-4, Table 5-7, and Table 5-8
• Added Table 5-9
• Added Section 5.3, Optional Sideband Signal
• Added Chapter 13,
• Removed reference to the PCI Express Mini Card Electromechanical Specification
for CLKREQ# signal details
• Added Section 2.8, CLKREQ# Signal (Optional)
• Updated Table 2-6
• Updated Section Liquid Cooling Enablement section
• Updated Figure 9-1 through Figure 9-8
• Update Figure 6-10 and Figure 6-11
• Replaced Figure 11-2
• Created Appendix D, Thermal Management
• Moved Chapter 12 into Appendix D
• Updated Appendix E, Acknowledgements
• Misc updates
June 9, 2021

PCI Express Card Electromechanical Specification
PCI Express Card Electromechanical Specification
June 9, 2021
Revision 5.0, Version 1.0 5
Contents
MAY 27, 2021 ............................................................................................................................. 1
1. INTRODUCTION ................................................................................................................. 14
1.1. Terms and Definitions ................................................................................................. 16
1.2. Reference Documents ................................................................................................ 18
1.3. Specification Contents ................................................................................................ 19
1.4. Objectives .................................................................................................................. 19
1.5. Electrical Overview ..................................................................................................... 20
1.6. Mechanical Overview ................................................................................................. 21
1.7. 150 W Overview ......................................................................................................... 23
1.8. 225 W and 300 W Add-in Card Overview ................................................................... 24
1.9. 600 W Add-in Card Overview ..................................................................................... 25
2. AUXILIARY SIGNALS ........................................................................................................ 26
2.1. Reference Clock ......................................................................................................... 27
Low Voltage Swing, Differential Clocks........................................................................ 27
Spread Spectrum Clocking (SSC) ............................................................................... 28
Clock Architecture Requirements ................................................................................ 28
REFCLK AC Specifications ......................................................................................... 29
REF CLK Phase Jitter Specification ............................................................................ 30
REFCLK Phase Jitter Specification for 32.0 GT/s Systems .......................................... 31
2.2. PERST# Signal .......................................................................................................... 31
Initial Power Up (G3 to S0) .......................................................................................... 31
Power Management States (S0 to S3/S4 to S0) .......................................................... 32
Power Down ............................................................................................................... 33
2.3. WAKE# Signal ............................................................................................................ 35
2.4. SMBus (Optional) ....................................................................................................... 38
Capacitive Load of High-power SMBus Lines .............................................................. 39
Minimum Current Sinking Requirements for SMBus Devices ....................................... 39
SMBus “Back Powering” Considerations ..................................................................... 39
Power-on Reset .......................................................................................................... 39
2.5. JTAG Pins (Optional) .................................................................................................. 40
2.6. PWRBRK# Signal (Optional) ...................................................................................... 41
2.7. MFG Signal (Optional) ................................................................................................ 41
2.8. CLKREQ# Signal (Optional) ....................................................................................... 42
Power-up Requirements.............................................................................................. 43
Dynamic Clock Control ................................................................................................ 43
2.9. Auxiliary Signal Parameter Specifications ................................................................... 45
DC Specifications........................................................................................................ 45
AC Specifications ........................................................................................................ 46
3. HOT INSERTION AND HOT REMOVAL ............................................................................ 48
3.1. Scope ......................................................................................................................... 48
3.2. Presence Detect ......................................................................................................... 48
4. ELECTRICAL REQUIREMENTS ........................................................................................ 52
4.1. Power Supply Requirements ...................................................................................... 52
4.2. Power Consumption ................................................................................................... 55
4.3. Power Budgeting Capability ........................................................................................ 56
4.4. Power Supply Sequencing.......................................................................................... 56
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