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TI-PCMD3140是一款四通道的PDM到TDM或I2S输出转换器，专为处理数字音频信号而设计。该器件的主要特点包括： 1. **四通道同步转换**：能够同时处理四个PDM麦克风输入，确保在多麦克风阵列中的音频数据同步。 2. **高性能动态范围**：提供了127dB的动态范围（DR），当使用5阶PDM输入时，以及117dB的DR，使用4阶PDM输入时。这种高动态范围确保了高质量的音频信号处理能力。 3. **通道相加模式**：支持两通道相加，以120dB的动态范围提供更高效的信号处理。 4. **可编程时钟输出**：PDM时钟输出范围为768kHz到6.144MHz，适应不同应用场景的时序需求。 5. **可编程输出采样率**：支持8kHz到768kHz的输出采样率，允许灵活地调整音频质量与处理速度。 6. **数字音量控制**：具有-100dB到27dB的可编程数字音量控制，以及0.1dB的增益校准分辨率，确保精确的音量调节。 7. **相位校准**：163ns的相位校准分辨率，有助于消除不同通道间的相位差异。 8. **集成功能**：内建麦克风偏置电压生成、语音激活检测（VAD）、低延迟滤波器选择、可编程HPF和双二阶数字滤波器，增强了音频处理能力。 9. **I2C控制**：通过I2C接口，可以方便地设置和控制转换器的各种参数，简化系统集成。 10. **音频串行数据接口**：支持TDM、I2S和左平衡（LJ）音频格式，字长可选16位、20位、24位或32位，同时支持主从模式，便于与其他音频设备交互。 11. **电源兼容性**：工作电压可以是3.3V或1.8V，I/O电源也可为3.3V或1.8V，低功耗设计使得该器件适合电池供电的便携式设备。 12. **低功耗**：在16kHz和48kHz采样率下，每个通道的功耗分别为2.8mW和3.6mW，有利于延长设备电池寿命。 13. **封装与温度范围**：采用20引脚WQFN封装，尺寸为3.00mm x 3.00mm，工作温度范围为-40°C至+125°C，适合在各种环境条件下使用。 TI-PCMD3140广泛应用于可视门铃、智能扬声器、楼宇安全网关、IP网络摄像头、GPS个人导航设备和视频会议系统等场合。其紧凑的尺寸、高性能特性和低功耗特性使其成为音频系统设计的理想选择，尤其是在空间有限和对音频质量有高要求的远场麦克风录音应用中。

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PCMD3140 四通道、PDM 输入至 TDM 或 I

S 输出转换器

1 特性

• 4 通道 PDM 麦克风同步转换

• PDM 输入至 TDM 或 I

S 输出转换器性能：

– 127dB 动态范围 (DR)，带高性能 5 阶 PDM 输

入

– 117dB 动态范围 (DR)，带高性能 4 阶 PDM 输

入

• 通道相加模式，DR 性能，带高性能 4 阶 PDM 输

入：

– 120dB，2 通道相加

• 可编程 PDM 时钟输出：

– 768kHz 至 6.144MHz

• 可编程输出采样率 (f

)：

– 8kHz 至 768kHz

• 可编程通道设置：

– 数字音量控制：–100dB 至 27dB

– 增益校准：0.1dB 分辨率

– 相位校准：163ns 分辨率

• 麦克风偏置或电源电压生成

• 话音激活检测 (VAD)

• 低延迟信号处理滤波器选择

• 可编程 HPF 和双二阶数字滤波器

• I

C 控制

• 集成高性能音频 PLL

• 自动时钟分频器设置配置

• 音频串行数据接口：

– 格式：TDM、I

S 或左平衡 (LJ)

– 字长：16 位、20 位、24 位或 32 位

– 主/从接口

• 单电源运行：3.3V 或 1.8V

• I/O 电源运行：3.3V 或 1.8V

• 1.8V 电源电压下的功耗：

– 16kHz 采样率下为 2.8mW/通道

– 48kHz 采样率下为 3.6mW/通道

2 应用

• 可视门铃

• 智能扬声器

• 楼宇安全网关

• IP 网络摄像头

• GPS 个人导航设备

• 视频会议系统

3 说明

PCMD3140 是一款高性能脉冲密度调制 (PDM) 输入至

时分多路复用 (TDM) 或 I

S 输出转换器，最多可支持

对 PDM 麦克风输入的四个数字通道进行同步采样。该

器件集成了可编程数字音量控制、麦克风偏置电压、锁

相环 (PLL)、可编程高通滤波器 (HPF)、双二阶滤波

器、低延迟滤波器模式，并可实现高达 768 kHz 的输

出采样率。该器件支持时分多路复用 (TDM)、I

S 或左

平衡 (LJ) 音频格式，并可通过 I

C 接口进行控制。此

外，PCMD3140 还支持主从模式选择，从而实现音频

总线接口操作。这些集成的高性能特性，以及采用

3.3V 或 1.8V 单电源供电的功能，使该器件非常适用于

远场麦克风录音应用中空间受限的音频系统。

PCMD3140 的额定工作温度范围为 –40°C 至

+125°C，并且采用 20 引脚 WQFN 封装。

器件信息

(1)

器件型号封装

封装尺寸（标称值）

PCMD3140 WQFN (20)

3.00mm × 3.00mm，间距

为 0.5mm

(1) 如需了解所有可用封装，请参阅数据表末尾的封装选项附录。

Audio Serial

Interface

(TDM, I

S, LJ)

PLL and Clock Generation

C Interface

MICBIAS, Regulators and

Voltage Reference

Programmable

Digital Filters,

Biquads

4-Channel

Digital PDM

Microphones

Simultaneous

Conversion

PDMDIN1_GPI1

PDMCLK_GPO1

PDMDIN2_GPI2

GPIO1

VREF

FSYNC

BCLK

SDOUT

SDA

SCL

AREG

DREG AVSS

Thermal Pad

(VSS)

AVDD

IOVDD

简化版方框图

PCMD3140

ZHCSMZ2A – DECEMBER 2020 – REVISED JUNE 2021

本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问

www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SBASA64

Table of Contents

1 特性................................................................................... 1

2 应用................................................................................... 1

3 说明................................................................................... 1

4 Revision History.............................................................. 2

5 Pin Configuration and Functions...................................3

6 Specifications.................................................................. 4

6.1 Absolute Maximum Ratings ....................................... 4

6.2 ESD Ratings .............................................................. 4

6.3 Recommended Operating Conditions ........................5

6.4 Thermal Information ...................................................5

6.5 Electrical Characteristics ............................................5

6.6 Timing Requirements: I

C Interface ...........................8

6.7 Switching Characteristics: I

C Interface .....................9

6.8 Timing Requirements: TDM, I

S or LJ Interface ........ 9

6.9 Switching Characteristics: TDM, I

S or LJ

Interface ....................................................................... 9

6.10 Timing Requirements: PDM Digital Microphone

Interface ..................................................................... 10

6.11 Switching Characteristics: PDM Digial

Microphone Interface ..................................................10

6.12 Timing Diagrams.....................................................10

6.13 Typical Characteristics............................................12

7 Detailed Description......................................................15

7.1 Overview................................................................... 15

7.2 Functional Block Diagram......................................... 16

7.3 Feature Description...................................................16

7.4 Device Functional Modes..........................................50

7.5 Programming............................................................ 51

7.6 Register Maps...........................................................54

8 Application and Implementation.................................. 93

8.1 Application Information............................................. 93

8.2 Typical Application.................................................... 93

8.3 What to Do and What Not to Do............................... 96

9 Power Supply Recommendations................................97

10 Layout...........................................................................98

10.1 Layout Guidelines................................................... 98

10.2 Layout Example...................................................... 98

11 Device and Documentation Support..........................99

11.1 Documentation Support.......................................... 99

11.2 接收文档更新通知................................................... 99

11.3 支持资源..................................................................99

11.4 Trademarks............................................................. 99

11.5 Electrostatic Discharge Caution.............................. 99

11.6 术语表..................................................................... 99

12 Mechanical, Packaging, and Orderable

Information.................................................................... 99

4 Revision History

注：以前版本的页码可能与当前版本的页码不同

Changes from Revision * (December 2020) to Revision A (June 2021) Page

• 将文档状态从预告信息更改为量产数据...............................................................................................................1

PCMD3140

ZHCSMZ2A – DECEMBER 2020 – REVISED JUNE 2021

www.ti.com.cn

2 Submit Document Feedback

Product Folder Links: PCMD3140

5 Pin Configuration and Functions

19 PDMDIN2_GPI26SDOUT

1NC 14 DREG

18 VREF7BCLK

2NC 13 SCL

17 AREG8FSYNC

3PDMDIN1_GPI1 12 SDA

16 AVDD9IOVDD

4PDMCLK_GPO1 11 GPIO1

Not to scale

Thermal Pad (VSS)

VSS

图 5-1. RTE Package, 20-Pin WQFN With Exposed Thermal Pad, Top View

表 5-1. Pin Functions

TYPE DESCRIPTION

NO. NAME

1 NC No connect No connection

2 NC No connect No connection

3 PDMDIN1_GPI1 Digital input

Digital input 1 (multipurpose functions such as digital microphones data, PLL input clock

source, and so forth).

4 PDMCLK_GPO1 Digital output

General-purpose digital output 1 (multipurpose functions such as digital microphone clock,

interrupt, and so forth).

5 VSS Ground supply

Device ground internally shorted to thermal pad. Short this package corner pin directly to

the board ground plane. See the package drawing at the end of this document for corner

pin dimensions.

6 SDOUT Digital output Audio serial data interface bus output.

7 BCLK Digital I/O Audio serial data interface bus bit clock.

8 FSYNC Digital I/O Audio serial data interface bus frame synchronization signal.

9 IOVDD Digital supply Digital I/O power supply (1.8 V or 3.3 V, nominal).

10 VSS Ground supply

Device ground internally shorted to thermal pad. Short this package corner pin directly to

the board ground plane. See the package drawing at the end of this document for corner

pin dimensions.

11 GPIO1 Digital I/O

General-purpose digital input/output 1 (multipurpose functions such as digital microphones

clock or data, PLL input clock source, interrupt, and so forth).

12 SDA Digital I/O Data pin for I

C control bus.

13 SCL Digital input Clock pin for I

C control bus.

14 DREG Digital supply

Digital regulator output voltage for digital core supply (1.5 V, nominal). Connect a 10-µF

and a 0.1-µF low ESR capacitor in parallel to the device ground (VSS).

15 VSS Ground supply

Device ground internally shorted to thermal pad. Short this package corner pin directly to

the board ground plane. See the package drawing at the end of this document for corner

pin dimensions.

16 AVDD Analog supply Analog power (1.8 V or 3.3 V, nominal).

17 AREG Analog supply

Analog on-chip regulator output voltage for analog supply (1.8 V, nominal) or external

analog power (1.8 V, nominal). Connect a 10-µF and a 0.1-µF low ESR capacitor in parallel

to the analog ground (AVSS).

18 VREF Analog Analog reference voltage filter output. Connect a 1-µF to the analog ground (AVSS).

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PCMD3140

ZHCSMZ2A – DECEMBER 2020 – REVISED JUNE 2021

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表 5-1. Pin Functions (continued)

TYPE DESCRIPTION

NO. NAME

19 PDMDIN2_GPI2 Analog output/digital input

Digital Input 2. MICBIAS output or general-purpose digital input 2 (multipurpose functions

such as digital microphones data, MICBIAS, PLL input clock source, and so forth). If used

as MICBIAS output, then connect a 1 µF to analog ground (AVSS)

20 VSS Ground supply

Device ground internally shorted to thermal pad. Short this package corner pin directly to

the board ground plane. See the package drawing at the end of this document for corner

pin dimensions.

Thermal Pad

(VSS)

Ground supply

Thermal pad is shorted to the internal device ground. Short the thermal pad directly to the

board ground plane.

6 Specifications

6.1 Absolute Maximum Ratings

over the operating ambient temperature range (unless otherwise noted)

(1)

MIN MAX UNIT

Supply voltage

AVDD to AVSS

–0.3

3.9

AREG to AVSS

–0.3

2.0

IOVDD to VSS (thermal pad)

–0.3

3.9

Ground voltage differences AVSS to VSS (thermal pad)

–0.3

0.3 V

Digital input voltage

Digital input except PDMDINx_GPIx pins voltage to VSS

(thermal pad)

–0.3

IOVDD + 0.3

Digital input PDMDINx_GPIx pins voltage to VSS

(thermal pad)

–0.3

AVDD + 0.3

Temperature

Operating ambient, T

–40

125

°C

Junction, T

–40

150

Storage, T

stg

–65

150

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

6.2 ESD Ratings

VALUE UNIT

(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001

(1)

±2000

Charged-device model (CDM), per JEDEC specification JESD22-C101

(2)

±500

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

PCMD3140

ZHCSMZ2A – DECEMBER 2020 – REVISED JUNE 2021

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6.3 Recommended Operating Conditions

MIN NOM MAX UNIT

POWER

AVDD,

AREG

(1)

Analog supply voltage AVDD to AVSS (AREG is generated using onchip regulator) -

AVDD 3.3-V operation

3.0 3.3 3.6

Analog supply voltage AVDD and AREG to AVSS (AREG internal regulator is

shutdown) - AVDD 1.8-V operation

1.7 1.8 1.9

IOVDD

IO supply voltage to VSS (thermal pad) - IOVDD 3.3-V operation 3.0 3.3 3.6

IO supply voltage to VSS (thermal pad) - IOVDD 1.8-V operation 1.65 1.8 1.95

INPUTS

Digital input except PDMDIN1_GPI1 and PDMDIN2_GPI2 pins voltage to VSS

(thermal pad)

0 IOVDD V

Digital input PDMDIN1_GPI1 and PDMDIN2_GPI2 pins voltage to VSS (thermal pad) 0 AVDD V

TEMPERATURE

Operating ambient temperature

–40

125 °C

OTHERS

GPIOx or GPIx (used as MCLK input) clock frequency 36.864 MHz

SCL and SDA bus capacitance for I

C interface supports standard-mode and fast-

mode

400

SCL and SDA bus capacitance for I

C interface supports fast-mode plus 550

Digital output load capacitance 20 50 pF

(1) AVSS and VSS (thermal pad): all ground pins must be tied together and must not differ in voltage by more than 0.2 V.

6.4 Thermal Information

THERMAL METRIC

(1)

PCMD3140

UNITRTW (WQFN)

24 PINS

θJA

Junction-to-ambient thermal resistance 55.9 °C/W

θJC(top)

Junction-to-case (top) thermal resistance 33.1 °C/W

θJB

Junction-to-board thermal resistance 23.4 °C/W

Junction-to-top characterization parameter 0.6 °C/W

Junction-to-board characterization parameter 23.3 °C/W

θJC(bot)

Junction-to-case (bottom) thermal resistance 16.7 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

6.5 Electrical Characteristics

at T

= 25°C, AVDD = 3.3 V, IOVDD = 3.3 V, f

= 1-kHz sinusoidal signal, f

= 48 kHz, PDMCLKx = 64 × f

32-bit audio

data, BCLK = 256 × f

, TDM slave mode, and PLL on (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

PERFORMANCE FOR PDM INPUT CONVERSION

SNR

Signal-to-noise ratio, A-

weighted

(1)

(2)

(3)

No signal, input generated using 5

-order PDM

modulator

130

No signal, input generated using 4

-order PDM

modulator

118

Dynamic range, A-

weighted

(2)

(3)

–60-dB full-scale signal input, input generated using 5

order PDM modulator

127

–60-dB full-scale signal input, input generated using 4

order PDM modulator

116

OTHER PARAMETERS

Digital volume control

range

Programmable 0.5-dB steps

–100

27 dB

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