TI-LM5050-2.pdf_lm5050-2资源-CSDN文库

V

IN

V

OUT

GND

OFF

OUT

IN

GATE

LM5050-2

Shutdown

GND

nFGD

Low= FET On, High= FET Off

+6V to +75V

Status

V

LOGIC

Low= OK, High= Fault

R

PULL-UP

LM5050-2

www.ti.com

SNVS679B –NOVEMBER 2010–REVISED MARCH 2013

LM5050-2 High Side OR-ing FET Controller

Check for Samples: LM5050-2

1

FEATURES

DESCRIPTION

The LM5050-2 High Side OR-ing FET Controller

2

• Wide Operating Input Voltage Range: +6V to

operates in conjunction with an external MOSFET as

+75V

an ideal diode rectifier when connected in series with

• +100 Volt Transient Capability

a power source. This OR-ing controller allows

• Charge Pump Gate Driver for External N-

MOSFETs to replace diode rectifiers in power

distribution networks thus reducing both power loss

Channel MOSFET

and voltage drops.

• MOSFET Diagnostic Test Mode

The LM5050-2 controller provides charge pump gate

• Fast 50ns Response to Current Reversal

drive for an external N-Channel MOSFET and a fast

• 2A Peak Gate Turn-off Current

response comparator to turn off the FET when

• Minimum V

DS

Clamp for Faster Turn-off

current flows in the reverse direction. The LM5050-2

can connect power supplies ranging from +6V to

• Package: SOT-6 (Thin SOT23-6)

+75V and can withstand transients up to +100V.

APPLICATIONS

The LM5050-2 also provides a FET test diagnostic

mode which allows the system controller to test for

• Active OR-ing of Redundant (N+1) Power

shorted MOSFETs.

Supplies

Typical Application Circuits

Figure 1. Full Application with MOSFET Diagnostic

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

LM5050-2

www.ti.com

SNVS679B –NOVEMBER 2010–REVISED MARCH 2013

Absolute Maximum Ratings

(1)(2)

IN, OUT Pins to Ground

(3)

-0.3V to 100V

GATE Pin to Ground

(3)

-0.3V to 100V

OFF Pin to Ground -0.3V to 7V

nFGD Pin to Ground (Off) -0.3V to 7V

Storage Temperature Range −65°C to 150°C

ESD

HBM

(4)

2 kV

MM

(5)

150V

Peak Reflow Temperature

(6)

260°C, 30sec

(1) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and

specifications.

(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including in-operability and degradation of

device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or

other conditions beyond those indicated in the Recommended Operating Conditions is not implied. Operating Range conditions indicate

the conditions at which the device is functional and the device should not be operated beyond such conditions. For specifications and

conditions, see Electrical Characteristics.

(3) The GATE pin voltage is typically 12V above the IN pin voltage when the LM5050-2 is enabled (i.e. OFF Pin is Open or Low, and V

IN

>

V

OUT

). Therefore, the Absolute Maximum Rating for the IN pin voltage applies only when the LM5050-2 is disabled (i.e. OFF Pin is logic

high), or for a momentary surge to that voltage since the Absolute Maximum Rating for the GATE pin is also 100V

(4) The Human Body Model (HBM) is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Applicable test standard is

JESD-22-A114-C.

(5) The Machine Model (MM) is a 200 pF capacitor discharged through a 0Ω resistor (i.e. directly) into each pin. Applicable test standard is

JESD-A115-A.

(6) For soldering specifications visit www.ti.com.

Operating Ratings

(1)

IN, OUT Pins +6.0V to +75V

OFF Pin Voltage 0.0V to 5.5V

nFGD Voltage (Off) 0.0V to 5.5V

nFGD Sink Current (On) 0 mA to 1 mA

Junction Temperature Range (T

J

) −40°C to +125°C

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including in-operability and degradation of

device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or

other conditions beyond those indicated in the Recommended Operating Conditions is not implied. Operating Range conditions indicate

the conditions at which the device is functional and the device should not be operated beyond such conditions. For specifications and

conditions, see Electrical Characteristics.

Product Folder Links: LM5050-2

LM5050-2

SNVS679B –NOVEMBER 2010–REVISED MARCH 2013

www.ti.com

Electrical Characteristics

Limits in standard type are for T

J

= 25°C only; limits in boldface type apply over the operating junction temperature (T

J

)

range of -40°C to +125°C. Minimum and Maximum limits are specified through test, design, or statistical correlation. Typical

values represent the most likely parametric norm at T

J

= 25°C, and are provided for reference purposes only. Unless

otherwise stated the following conditions apply: V

IN

= 12.0V, V

OUT

= 12.0V, V

OFF

= 0.0V, C

GATE

= 47 nF, and T

J

= 25°C.

Symbol Parameter Conditions Min Typ Max Unit

IN Pin

V

IN

Operating Supply Range 6.0 - 75.0 V

V

IN

= 6.0V

GATE = Open 180 240 300

V

OUT

= V

IN

- 100 mV

V

IN

= 12.0V

I

IN

IN Pin current GATE = Open 262 350 440 μA

V

OUT

= V

IN

- 100 mV

V

IN

= 75.0V

GATE = Open 275 355 460

V

OUT

= V

IN

- 100 mV

OUT Pin

V

IN

= 6.0V

74 95 115

V

OUT

= V

IN

- 100 mV

V

IN

= 12.0V

I

OUT

OUT Pin Current 70 110 160 uA

V

OUT

= V

IN

- 100 mV

V

IN

= 75.0V

35 125 265

V

OUT

= V

IN

- 100 mV

GATE Pin

V

IN

= 6.0V to 75V

I

GATE(ON)

GATE Pin Source Current V

GATE

= V

IN

18.0 32. 45.0 uA

V

OUT

= V

IN

- 175 mV

V

IN

= 6.0V

6.0 6.8 7.4

V

OUT

= V

IN

- 175 mV

V

IN

= 12.0V

V

GS

V

GATE

- V

IN

in Forward Operation

(1)

8.0 11.5 14.7 V

V

OUT

= V

IN

- 175 mV

V

IN

= 75.0V

8.0 11 14.5

V

OUT

= V

IN

- 175 mV

C

GATE

= 0

(2)

- 27 100

Gate Capacitance Discharge Time at

t

GATE(REV)

Forward to Reverse Transition C

GATE

= 10 nF

(2)

- 61 - ns

See Figure 4

C

GATE

= 47 nF

(2)

- 205 425

Gate Capacitance DischargeTime at

t

GATE(OFF)

OFF pin Low to High Transition C

GATE

= 47 nF

(3)

- 450 - ns

See Figure 5

V

GATE

= V

IN

+ 3V

I

GATE(OFF)

GATE Pin Sink Current V

OUT

> V

IN

+ 100 mV 1.9 2.8 - A

t ≤ 10ms

Reverse V

SD

Threshold

V

SD(REV)

V

IN

- V

OUT

-37 -27 -17 mV

V

IN

< V

OUT

ΔV

SD(REV)

Reverse V

SD

Hysteresis - 10 - mV

V

IN

= 6.0V

6 20 33

V

IN

- V

OUT

Regulated Forward V

SD

Threshold

V

SD(REG)

mV

V

IN

> V

OUT

V

IN

= 12.0V

2 16 31

V

IN

- V

OUT

(1) Measurement of V

GS

voltage (i.e. V

GATE

- V

IN

) includes 1 MΩ in parallel with C

GATE

(2) Time from V

IN

-V

OUT

voltage transition from 200mV to -500mV until GATE pin voltage falls to V

IN

+ 1V. See Figure 4

(3) Time from V

OFF

voltage transition from 0.0V to 5.0V until GATE pin voltage falls to V

IN

+ 1V. See Figure 5

Product Folder Links: LM5050-2

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