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TI-LMD18400.pdf
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LMD18400
www.ti.com
SNVS094C –JUNE 1996–REVISED APRIL 2013
LMD18400 Quad High Side Driver
Check for Samples: LMD18400
1
FEATURES
APPLICATIONS
2
• Four Independent Outputs with >3A Peak, 1A
• Relay and Solenoid Drivers
Continuous Current Capability
• High Impedance Automotive Fuel Injector
• 1.3Ω Maximum ON Resistance Over Drivers
Temperature
• Lamp Drivers
• True Instantaneous Power Limit for Each
• Power Supply Switching
Switch
• Motor Drivers
• High Survival Voltage (60 V
DC
, 80V Transient)
• Shorted Load (to Ground and Supply) DESCRIPTION
Protection
The LMD18400 is a fully protected quad high side
driver. It contains four common-drain DMOS N-
• Overvoltage Shutdown at V
CC
> 35V
channel power switches, each capable of switching a
• LS TTL/CMOS Compatible Logic Inputs and
continuous 1 Amp load (>3 Amps transient) to a
Outputs
common positive power supply. The switches are fully
• <10 µA Supply Current in “Sleep” Mode
protected from excessive voltage, current and
temperature. An instantaneous power sensing circuit
• −5V Output Clamp for Discharging Inductive
calculates the product of the voltage across and the
Loads
current through each DMOS switch and limits the
• Serial Data Interface for 11 Diagnostic Checks:
power to a safe level. The device can be disabled to
– Switch ON/OFF Status
produce a “sleep” condition reducing the supply
current to less than 10 µA. Separate ON/OFF control
– Open or Shorted Load
of each switch is provided through standard
– Operating Temperature
LSTLL/CMOS logic compatible inputs.
– Excessive Supply Voltage
A MICROWIRE compatible serial data interface is
• Two Direct-output Error Flags
built in to provide extensive diagnostic information.
This information includes switch status readback,
output load fault conditions and thermal and
overvoltage shutdown status. There are also two
direct-output error flags to provide an immediate
indication of a general system fault and an indication
of excessive operating temperature.
The LMD18400 is packaged in a special power
dissipating leadframe that reduces the junction to
case thermal resistance to approximately 20°C/W.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 1996–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LMD18400
www.ti.com
SNVS094C –JUNE 1996–REVISED APRIL 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
(1)(2)
Supply Survival Voltage (Pin 20)
Transient (t = 10 ms) 80V
Continuous −0.5V to +60V
Output Transient Current (Each Switch) 3.75A
Output Transient Current
(Total, All Switches) 6A
Output Steady State Current
(Each Switch) 1A
Logic Input Voltage
(Pins 3, 9, 10, 11, 12) −0.3V to +16V
Logic Input Voltage (Pins 4, 7) −0.3V to +6V
Error Flag Voltage 16V
ESD Susceptibility
(3)
2000V
Power Dissipation
(4)
5W
Internally Limited
Junction Temperature (T
J
MAX
150°C)
150°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 sec.) +260°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) Human body model; 100 pF discharge through a 1.5 kΩ resistor. All pins except pins 8 and 13 which are protected to 1000V and pins 1,
2, 18 and 19 which are protected to 500V.
(4) The maximum power dissipation is a function of T
J
MAX
, θ
JA
, and T
A
and is limited by thermal shutdown. The maximum allowable power
dissipation at any ambient temperature is P
D
= (T
J
MAX
–T
A
)/θ
JA
. If this dissipation is exceeded, the die temperature will rise above 150°C
and the device will eventually go into thermal shutdown. For the LMD18400 the junction-to-ambient thermal resistance, θ
JA
, is 60°C/W.
With sufficient heatsinking the maximum continuous power dissipation for the package will be, I
DC
MAX
2
× R
ON
(MAX)
× 4 switches 1A
2
× 1.3Ω
× 4 = 5.2W).
OPERATING RATINGS
(1)
Ambient Temperature Range (T
A
) −25°C to +85°C
Supply Voltage Range 7V to 28V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics.
ELECTRICAL CHARACTERISTICS
V
CC
= 12V, C
CP
= 0.01 µFd, unless otherwise indicated. Boldface limits apply over the entire operating temperature range,
−25°C ≤ T
A
≤ +85°C, all other limits are for T
A
= T
J
= +25°C.
Typical Limit Units
Parameter Conditions
(1) (2)
(Limit)
DC CHARACTERISTICS
Supply Current Enable Input = 0V 0.04 10 µA (Max)
Enable Input = 5V, Inputs = 0V 7.5 15 mA (Max)
Enable Input = 5V, Inputs = 5V
Open Loads 7.5 15 mA (Max)
(1) Typical values are at T
J
= +25°C and represent the most likely parametric norm.
(2) All limits are 100% production tested at +25°C. Limits at temperature extremes are specified through correlation and accepted Statistical
Quality Control (SQC) methods.
Copyright © 1996–2013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: LMD18400
LMD18400
SNVS094C –JUNE 1996–REVISED APRIL 2013
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
V
CC
= 12V, C
CP
= 0.01 µFd, unless otherwise indicated. Boldface limits apply over the entire operating temperature range,
−25°C ≤ T
A
≤ +85°C, all other limits are for T
A
= T
J
= +25°C.
Typical Limit Units
Parameter Conditions
(1) (2)
(Limit)
Output Leakage Enable Input = 0V, Inputs = 0V
0.01 300 µA (Max)
(Pins 1, 2, 18, 19)
Rds ON I
OUT
= 1A,
(3)
0.8 1.3 Ω (Max)
Short Circuit Current V
CC
= 12V,
(3)
1.2 0.6 A (Min)
V
CC
= 7V,
(3)
2.4 A
V
CC
= 28V,
(3)
0.6 A
Maximum Output Current V
CC
−V
O
= 4V,
(3)
3.75 A
Lead Error Threshold Voltage Pins 1, 2, 18, 19 4.1 V
Open Load Detection Current Pins 1, 2, 18, 19 150 µA
Negative Clamp Output Voltage I
O
= 1A,
(3)
−5 V
Overvoltage Shutdown Threshold 31 40 V (Max)
Overvoltage Shutdown Hysteresis 0.75 V
Error Output Leakage Current V
PIN 13
= 12V 0.001 10 µA (Max)
Thermal Warning Temperature V
PIN 13
< 0.8V 145 °C
Thermal Shutdown Temperature V
PIN 17
< 0.8V 170 °C
Thermal Warning Temperature V
PIN 13
< 0.8V 145 °C
AC CHARACTERISTICS
Switch Turn-On Delay (t
d(ON)
) Enable (Pin 3) = 5V, I
OUT
= 1A 5 10 µs (Max)
Switch Turn-On Rise Time (t
ON
) I
OUT
= 1A 7 15 µs (Max)
Switch Turn-Off Delay (t
d(OFF)
) Enable (Pin 3) = 5V, I
OUT
= 1A 0.5 2 µs (Max)
Switch Turn-Off Fall Time (t
OFF
) I
OUT
= 1A 0.15 1 µs (Max)
Enable Time (t
EN
) Measured with Switch 1, Pin 9 = 5V 30 50 µs (Max)
Error Reporting Delay (t
Error
) Enable (Pin 3) = 5V, Switch 1 Load Opened 75 150 µs (Max)
Data Setup Time (t
DS
) C
L
= 30 pF 200 500 ns (Min)
TRI-STATE Control (t
1H
, t
OH
) Pin 8, Hi-Z Enable Time 2 µs
Data Clock Frequency 3 1 MHz (Max)
DIGITAL CHARACTERISTICS
Logic “1” Input Voltage Pins 3, 4, 7, 9, 10, 11, 12 2.0 V (Min)
Logic “0” Input Voltage Pins 3, 4, 7, 9, 10, 11, 12 0.8 V (Max)
Logic “1” Input Current Pins 4, 7 0.001 1 µA (Max)
Logic “0” Input Current Pins 4, 7 −0.001 −1 µA (Max)
TRI-STATE Output Current Pin 8, Pin 4 = 5V 0.05 10 µA (Max)
Pin 8 = 0V −0.05 −10 µA (Max)
Enable Input Current Pin 3 = 2.4V 12 25 µA (Max)
Channel Input Resistance Pins 9, 10, 11, 12 75 15 kΩ (Min)
Error Output Sink Current Pin 13 = 0.8V 4 1.6 mA (Min)
Logic “1” Output Voltage Pin 8
I
OUT
= −360 µA 4.4 2.4 V (Min)
I
OUT
= −10 µA 5.1 4.5 V (Min)
I
OUT
= −10 µA 5.5 V (Min)
Logic “0” Output Voltage Pin 8
0.4 V (Max)
I
OUT
= 100 µA
Thermal Shutdown Output Source Current Pin 17 = 2.4V 5 3 µA (Min)
Thermal Shutdown Output Sink Current Pin 17 = 0.8V 360 250 µA (Min)
(3) Pulse Testing techniques used. Pulse width is < 5 ms with a duty cycle < 1%.
4 Submit Documentation Feedback Copyright © 1996–2013, Texas Instruments Incorporated
Product Folder Links: LMD18400
LMD18400
www.ti.com
SNVS094C –JUNE 1996–REVISED APRIL 2013
TIMING SPECIFICATION DEFINITIONS
Figure 2. Switching Turn ON/OFF
Figure 3. Enable Turn-On
Figure 4. Error Reporting Delay
Figure 5. Data Setup Time
Copyright © 1996–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: LMD18400
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