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NCV7425 带 LIN 和 150 mA LDO 稳压器的系统基础芯片-综合文档
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NCV7425 带 LIN 和 150 mA LDO 稳压器的系统基础芯片
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© Semiconductor Components Industries, LLC, 2015
May, 2015 − Rev. 3
1 Publication Order Number:
NCV7425/D
NCV7425
LIN Transceiver with
Voltage Regulator and
Reset Pin
General Description
The NCV7425 is a fully featured local interconnect network (LIN)
transceiver designed to interface between a LIN protocol controller
and the physical bus.
The NCV7425 LIN device is a member of the in−vehicle
networking (IVN) transceiver family of ON Semiconductor that
integrates a LIN v2.1 physical transceiver and a low−drop voltage
regulator.
The LIN bus is designed to communicate low rate data from control
devices such as door locks, mirrors, car seats, and sunroofs at the
lowest possible cost. The bus is designed to eliminate as much wiring
as possible and is implemented using a single wire in each node. Each
node has a slave MCU−state machine that recognizes and translates
the instructions specific to that function. The main attraction of the
LIN bus is that all the functions are not time critical and usually relate
to passenger comfort.
Features
• LIN−Bus Transceiver
♦ LIN compliant to specification revision 2.1
(backward compatible to versions 2.0 and 1.3) and
J2602
♦ Bus Voltage ±45 V
♦ Transmission Rate up to 20 kBaud
♦ Integrated Slope Control for Improved EMI
Compatibility
• Package
♦ SOIC−16 Wide Body Package with Exposed Pad
• Protection
♦ Thermal Shutdown
♦ Indefinite Short−Circuit Protection on Pins LIN and
WAKE Towards Supply and Ground
♦ Load Dump Protection (45 V)
♦ Bus Pins Protected Against Transients in an
Automotive Environment
♦ ESD Protection Level for LIN, INH, WAKE and
V
BB
up to ±10 kV
• Voltage Regulator
♦ Two Device Versions: Output Voltage 3.3 V or 5 V
For Loads up to 150 mA
♦ Undervoltage Detector with a Reset Output to the
Supplied Microcontroller
♦ INH Output for Auxiliary Purposes (switching of an
external pull−up or resistive divider towards battery,
control of an external voltage regulator etc.)
• Modes
♦ Normal Mode: LIN Communication in Either Low
(up to 10 kBaud) or Normal Slope
♦ Sleep Mode: V
CC
is Switched “off” and No
Communication on LIN Bus
♦ Standby Mode: V
CC
is Switched “on” but There is
No Communication on LIN Bus
♦ Wake−up Bringing the Component From Sleep
Mode Into Standby Mode is Possible Either by LIN
Command or Digital Input Signal on WAKE Pin
Wake−up from LIN Bus can also be Detected and
Flagged When the Chip is Already in Standby Mode
Quality
• NCV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change
Requirements; AEC−Q100 Qualified and PPAP
Capable
• These Devices are Pb−Free, Halogen Free/BFR Free
and are RoHS Compliant
Typical Applications
• Automotive
• Industrial Networks
SOIC−16 LEAD
WIDE BODY
EXPOSED PAD
CASE 751AG
MARKING
DIAGRAM
NCV7425−x
AWLYYWWG
1
16
1
16
www.onsemi.com
x = 0 or 5
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
See detailed ordering and shipping information in the
package dimensions section on page 19 of this data sheet.
ORDERING INFORMATION
NCV7425
www.onsemi.com
2
Table 1. KEY TECHNICAL CHARACTERISTICS
Symbol Parameter Min Typ Max Unit
3.3 V VERSION
V
BB
Nominal battery operating voltage 5 12 28 V
V
BB
Load dump protection (Note 1) 45 V
I
BB
_SLP Supply current in sleep mode 20
mA
V
CC_OUT
(Note 2)
Regulated V
CC
output in normal mode, V
CC
load 0−100 mA 3.234 3.3 3.366
V
Regulated V
CC
output in normal mode, 100 mA < V
CC
load < 150 mA 3.201 3.3 3.399
I
OUT_LIM
V
CC
regulator current limitation 150 225 300 mA
V
WAKE
Operating DC voltage on WAKE pin 0 V
BB
V
Maximum rating voltage on WAKE pin −45 45
V
INH
Operating DC voltage on INH pin 0 V
BB
V
T
J_TSD
Junction thermal shutdown temperature 165 195 °C
T
J
Operating junction temperature −40 +150 °C
5 V VERSION
V
BB
Nominal battery operating voltage 6 12 28 V
V
BB
Load dump protection (Note 1) 45 V
I
BB_SLP
Supply current in sleep mode 20
mA
V
CC_OUT
(Note 2)
Regulated V
CC
output in normal mode, V
CC
load 0−100 mA 4.90 5 5.10 V
Regulated V
CC
output in normal mode, 100 mA < V
CC
load < 150 mA 4.85 5 5.15 V
I
OUT_LIM
V
CC
regulator current limitation 150 225 300 mA
V
WAKE
Operating DC voltage on WAKE pin 0 V
BB
V
Maximum rating voltage on WAKE pin −45 45
V
INH
Operating DC voltage on INH pin 0 V
BB
V
T
J_TSD
Junction thermal shutdown temperature 165 195 °C
T
J
Operating junction temperature −40 +150 °C
1. The applied transients shall be in accordance with ISO 7637 part 1, test pulse 5. The device complies with functional class C;. The LIN
communication itself complies with functional class B. On regulator class A can be reached depending on the application and external
components
2. V
CC
voltage must be properly stabilized by external capacitors: capacitor of min. 80 nF with ESR < 10 mW in parallel with a capacitor of min.
8 mF, ESR < 1 W.
Table 2. THERMAL CHARACTERISTICS
Symbol Parameter Conditions Value Unit
R
th(vj−a)_1
Thermal resistance junction−to−ambient on JEDEC 1S0P PCB Free Air 138 K/W
R
th(vj−a)_2
Thermal resistance junction−to−ambient on JEDEC 1S0P + 300 mm
2
PCB Free Air 94 K/W
R
th(vj−a)_3
Thermal resistance junction−to−ambient on JEDEC 2S2P PCB Free Air 70 K/W
R
th(vj−a)_4
Thermal resistance junction−to−ambient on JEDEC 2S2P + 300 mm
2
PCB Free Air 49 K/W
NCV7425
www.onsemi.com
3
PD20090609 .1
STB
V
CC
TxD
V
CC
EN
V
CC
RSTN
RxD
V
CC
WAKE
Control Logic
NCV7425
LIN
Timeout
Slope
Control
Receiver
GND
Thermal
shutdown
Osc
V
BB
V
BB
INH
V
CC
V−reg
Band−
gap
TEST
OTP_ZAP
POR
V
BB
V
CC
Figure 1. Block Diagram
TYPICAL APPLICATION
Application Information
The EMC immunity of the Master−mode device can be
further enhanced by adding a capacitor between the LIN
output and ground. The optimum value of this capacitor is
determined by the length and capacitance of the LIN bus, the
number and capacitance of Slave devices, the pull−up
resistance of all devices (Master and Slave), and the required
time constant of the system, respectively.
V
CC
voltage must be properly stabilized by external
capacitors: capacitor of min. 80 nF (ESR < 10 mW) in
parallel with a capacitor of min. 8 mF (ESR < 1 W).
The 10 mF capacitor on the battery is optional and serves
as reservoir capacitor to deal with battery supply
micro−cuts.
KL30
LIN−BUS
KL31
LIN
Master Node
1nF 1kW
GND
NCV7425
Micro
controller
RxD
TxD
EN
STB
GND
INH
V
BB
VBAT
GND
10nF
WAKE
LIN
Slave Node
220pF
GND
Micro
controller
VBAT
GND
WAKE
10uF
100nF
V
CC V
CC
10uF 100nF
RSTN
TESTOTP_ZAP
10nF
RxD
TxD
EN
STB
GND
INH
V
BB
V
CC
RSTN
TESTOTP_ZAP
LIN
WAKE
10uF 100nF10uF 100nF
V
CC
LIN
WAKE
PD20090609.2
Figure 2. Application Diagram
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