Release 10.1.03 - par K.39 (nt)
Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.
Mon Aug 23 17:50:37 2010
INFO: The IO information is provided in three file formats as part of the Place and Route (PAR) process. These formats are:
1. The <design name>_pad.txt file (this file) designed to provide information on IO usage in a human readable ASCII text format viewable through common text editors.
2. The <design namd>_pad.csv file for use with spreadsheet programs such as MS Excel. This file can also be read by PACE to communicate post PAR IO information.
3. The <design name>.pad file designed for parsing by customers. It uses the "|" as a data field separator.
INPUT FILE: comp4_map.ncd
OUTPUT FILE: comp4_pad.txt
PART TYPE: xc3s500e
SPEED GRADE: -4
PACKAGE: pq208
Pinout by Pin Number:
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|Pin Number|Signal Name|Pin Usage|Pin Name |Direction|IO Standard|IO Bank Number|Drive (mA)|Slew Rate|Termination|IOB Delay|Voltage |Constraint|DCI Value|IO Register|Signal Integrity|
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|P1 | | |PROG_B | | | | | | | | | | | | |
|P2 | |DIFFM |IO_L01P_3 |UNUSED | |3 | | | | | | | | | |
|P3 | |DIFFS |IO_L01N_3 |UNUSED | |3 | | | | | | | | | |
|P4 | |DIFFM |IO_L02P_3 |UNUSED | |3 | | | | | | | | | |
|P5 | |DIFFS |IO_L02N_3/VREF_3 |UNUSED | |3 | | | | | | | | | |
|P6 |x<1> |IBUF |IP |INPUT |LVCMOS25* |3 | | | |NONE | |LOCATED | |NO |NONE |
|P7 | | |VCCAUX | | | | | | | |2.5 | | | | |
|P8 | |DIFFM |IO_L03P_3 |UNUSED | |3 | | | | | | | | | |
|P9 | |DIFFS |IO_L03N_3 |UNUSED | |3 | | | | | | | | | |
|P10 | | |GND | | | | | | | | | | | | |
|P11 | |DIFFM |IO_L04P_3 |UNUSED | |3 | | | | | | | | | |
|P12 | |DIFFS |IO_L04N_3 |UNUSED | |3 | | | | | | | | | |
|P13 | | |VCCINT | | | | | | | |1.2 | | | | |
|P14 |x<0> |IBUF |IP |INPUT |LVCMOS25* |3 | | | |NONE | |LOCATED | |NO |NONE |
|P15 | |DIFFM |IO_L05P_3 |UNUSED | |3 | | | | | | | | | |
|P16 | |DIFFS |IO_L05N_3 |UNUSED | |3 | | | | | | | | | |
|P17 | | |GND | | | | | | | | | | | | |
|P18 | |DIFFM |IO_L06P_3 |UNUSED | |3 | | | | | | | | | |
|P19 | |DIFFS |IO_L06N_3 |UNUSED | |3 | | | | | | | | | |
|P20 |y<3> |IBUF |IP/VREF_3 |INPUT |LVCMOS25* |3 | | | |NONE | |LOCATED | |NO |NONE |
|P21 | | |VCCO_3 | | |3 | | | | |2.50 | | | | |
|P22 | |DIFFM |IO_L07P_3/LHCLK0 |UNUSED | |3 | | | | | | | | | |
|P23 | |DIFFS |IO_L07N_3/LHCLK1 |UNUSED | |3 | | | | | | | | | |
|P24 | |DIFFM |IO_L08P_3/LHCLK2 |UNUSED | |3 | | | | | | | | | |
|P25 | |DIFFS |IO_L08N_3/LHCLK3/IRDY2 |UNUSED | |3 | | | | | | | | | |
|P26 |y<2> |IBUF |IP |INPUT |LVCMOS25* |3 | | | |NONE | |LOCATED | |NO |NONE |
|P27 | | |GND | | | | | | | | | | | | |
|P28 | |DIFFM |IO_L09P_3/LHCLK4/TRDY2 |UNUSED | |3 | | | | | | | | | |
|P29 | |DIFFS |IO_L09N_3/LHCLK5 |UNUSED | |3 | | | | | | | | | |
|P30 |gt |IOB |IO_L10P_3/LHCLK6 |OUTPUT |LVCMOS25* |3 |12 |SLOW |NONE** | | |LOCATED | |NO |NONE |
|P31 |it |IOB |IO_L10N_3/LHCLK7 |OUTPUT |LVCMOS25* |3 |12 |SLOW |NONE** | | |LOCATED | |NO |NONE |
|P32 |y<1> |IBUF |IP |INPUT |LVCMOS25* |3 | | | |NONE | |LOCATED | |NO |NONE |
|P33 |eq |IOB |IO_L11P_3 |OUTPUT |LVCMOS25* |3 |12 |SLOW |NONE**