没有合适的资源?快使用搜索试试~ 我知道了~
TI-TMS320F280049M.pdf
需积分: 0 0 下载量 30 浏览量
2022-12-08
23:26:52
上传
评论 4
收藏 2.58MB PDF 举报
温馨提示
试读
217页
TI-TMS320F280049M.pdf
资源推荐
资源详情
资源评论
Product
Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
Community
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TMS320F280049
,
TMS320F280049C
TMS320F280048
,
TMS320F280048C
,
TMS320F280045
TMS320F280041, TMS320F280041C, TMS320F280040, TMS320F280040C
SPRS945C –JANUARY 2017–REVISED DECEMBER 2017
TMS320F28004x Piccolo™ Microcontrollers
1 Device Overview
1
1.1 Features
1
• TMS320C28x 32-Bit CPU
– 100 MHz
– IEEE 754 Single-Precision Floating-Point Unit
(FPU)
– Trigonometric Math Unit (TMU)
– 3×-Cycle to 4×-Cycle Improvement for
Common Trigonometric Functions Versus
Software Libraries
– 13-Cycle Park Transform
– Viterbi/Complex Math Unit (VCU-I)
– Ten Hardware Breakpoints
• Programmable Control Law Accelerator (CLA)
– 100 MHz
– IEEE 754 Single-Precision Floating-Point
Instructions
– Executes Code Independently of Main CPU
• On-Chip Memory
– 256KB (128KW) of Flash (ECC-Protected)
Across Two Independent Banks
– 100KB (50KW) of RAM (ECC-Protected or
Parity-Protected)
– Dual-Zone Security Supporting Third-Party
Development
– Unique Identification Number
• Clock and System Control
– Two Internal Zero-Pin 10-MHz Oscillators
– On-Chip Crystal Oscillator and External Clock
Input
– Windowed Watchdog Timer Module
– Missing Clock Detection Circuitry
• 1.2-V Core, 3.3-V I/O Design
– Internal VREG or DC-DC for 1.2-V Generation
Allows for Single-Supply Designs
– Brownout Reset (BOR) Circuit
• System Peripherals
– 6-Channel Direct Memory Access (DMA)
Controller
– 40 Individually Programmable Multiplexed
General-Purpose Input/Output (GPIO) Pins
– 21 Digital Inputs on Analog Pins
– Enhanced Peripheral Interrupt Expansion (ePIE)
Module
– Multiple Low-Power Mode (LPM) Support With
External Wakeup
– Embedded Real-Time Analysis and Diagnostic
(ERAD)
• Communications Peripherals
– One Power Management Bus (PMBus) Interface
– One Inter-Integrated Circuit (I2C) Interface
(Pin-Bootable)
– Two Controller Area Network (CAN) Bus Ports
(Pin-Bootable)
– Two Serial Peripheral Interface (SPI) Ports
(Pin-Bootable)
– Two Serial Communication Interfaces (SCIs)
(Pin-Bootable)
– One Local Interconnect Network (LIN)
– One Fast Serial Interface (FSI) With a
Transmitter and Receiver
• Analog System
– Three 3.45-MSPS, 12-Bit Analog-to-Digital
Converters (ADCs)
– Up to 21 External Channels
– Four Integrated Post-Processing Blocks
(PPBs) per ADC
– Seven Windowed Comparators (CMPSS) With
12-Bit Reference Digital-to-Analog Converters
(DACs)
– Digital Glitch Filters
– Two 12-Bit Buffered DAC Outputs
– Seven Programmable Gain Amplifiers (PGAs)
– Programmable Gain Settings: 3, 6, 12, 24
– Programmable Output Filtering
• Enhanced Control Peripherals
– 16 ePWM Channels With High-Resolution
Capability (150-ps Resolution)
– Integrated Dead-Band Support With High
Resolution
– Integrated Hardware Trip Zones (TZs)
– Seven Enhanced Capture (eCAP) Modules
– High-Resolution Capture (HRCAP) Available
on Two Modules
– Two Enhanced Quadrature Encoder Pulse
(eQEP) Modules With Support for CW/CCW
Operation Modes
– Four Sigma-Delta Filter Module (SDFM) Input
Channels (Two Parallel Filters per Channel)
– Standard SDFM Data Filtering
– Comparator Filter for Fast Action for
Overvalue or Undervalue Condition
• Configurable Logic Block (CLB)
– Augments Existing Peripheral Capability
– Supports Position Manager Solutions
2
TMS320F280049
,
TMS320F280049C
TMS320F280048
,
TMS320F280048C
,
TMS320F280045
TMS320F280041, TMS320F280041C, TMS320F280040, TMS320F280040C
SPRS945C –JANUARY 2017–REVISED DECEMBER 2017
www.ti.com
Submit Documentation Feedback
Product Folder Links: TMS320F280049 TMS320F280049C TMS320F280048 TMS320F280048C TMS320F280045
TMS320F280041 TMS320F280041C TMS320F280040 TMS320F280040C
Device Overview Copyright © 2017, Texas Instruments Incorporated
• InstaSPIN-FOC™
– Sensorless Field-oriented Control (FOC) With
FAST™ Software Encoder
– Library in On-chip ROM Memory
• Package Options:
– 100-Pin Low-Profile Quad Flatpack (LQFP)
[PZ Suffix]
– 64-Pin LQFP [PM Suffix]
– 56-Pin Very Thin Quad Flatpack No-Lead
(VQFN) [RSH Suffix]
• Temperature Options:
– S: –40°C to 125°C Junction
– Q: –40ºC to 125ºC Free-Air
(AEC Q100 Qualification for Automotive
Applications)
1.2 Applications
• Appliances
• Building Automation
• Electric Vehicle/Hybrid Electric Vehicle (EV/HEV)
Powertrain
• Factory Automation
• Grid Infrastructure
• Industrial Transport
• Medical, Healthcare, and Fitness
• Motor Drives
• Power Delivery
• Telecom Infrastructure
• Test and Measurement
3
TMS320F280049
,
TMS320F280049C
TMS320F280048
,
TMS320F280048C
,
TMS320F280045
TMS320F280041, TMS320F280041C, TMS320F280040, TMS320F280040C
www.ti.com
SPRS945C –JANUARY 2017–REVISED DECEMBER 2017
Submit Documentation Feedback
Product Folder Links: TMS320F280049 TMS320F280049C TMS320F280048 TMS320F280048C TMS320F280045
TMS320F280041 TMS320F280041C TMS320F280040 TMS320F280040C
Device OverviewCopyright © 2017, Texas Instruments Incorporated
1.3 Description
The Piccolo™ TMS320F28004x (F28004x) is a powerful 32-bit floating-point microcontroller unit (MCU)
that lets designers incorporate crucial control peripherals, differentiated analog, and nonvolatile memory
on a single device.
The real-time control subsystem is based on TI’s 32-bit C28x CPU, which provides 100 MHz of signal
processing performance. The C28x CPU is further boosted by the new TMU extended instruction set,
which enables fast execution of algorithms with trigonometric operations commonly found in transforms
and torque loop calculations; and the VCU-I extended instruction set, which reduces the latency for
complex math operations commonly found in encoded applications.
The CLA allows significant offloading of common tasks from the main C28x CPU. The CLA is an
independent 32-bit floating-point math accelerator that executes in parallel with the CPU. Additionally, the
CLA has its own dedicated memory resources and it can directly access the key peripherals that are
required in a typical control system. Support of a subset of ANSI C is standard, as are key features like
hardware breakpoints and hardware task-switching.
The F28004x supports up to 256KB (128KW) of flash memory divided into two 128KB (64KW) banks,
which enables programming and execution in parallel. Up to 100KB (50KW) of on-chip SRAM is also
available in blocks of 4KB (2KW) and 16KB (8KW) for efficient system partitioning. Flash ECC, SRAM
ECC/parity, and dual-zone security are also supported.
High-performance analog blocks are integrated on the F28004x MCU to further enable system
consolidation. Three separate 12-bit ADCs provide precise and efficient management of multiple analog
signals, which ultimately boosts system throughput. Seven PGAs on the analog front end enable on-chip
voltage scaling before conversion. Seven analog comparator modules provide continuous monitoring of
input voltage levels for trip conditions.
The TMS320C2000™ devices contain industry-leading control peripherals with frequency-independent
ePWM/HRPWM and eCAP allow for a best-in-class level of control to the system. The built-in 4-channel
SDFM allows for seamless integration of an oversampling sigma-delta modulator across an isolation
barrier.
Connectivity is supported through various industry-standard communication ports (such as SPI, SCI, I2C,
LIN, and CAN) and offers multiple muxing options for optimal signal placement in a variety of applications.
New to the C2000™ platform is the fully compliant PMBus. Additionally, in an industry first, the FSI
enables high-speed, robust communication to complement the rich set of peripherals that are embedded
in the device.
A specially enabled device variant, TMS320F28004xC, allows access to the Configurable Logic Block
(CLB) for additional interfacing features and allows access to the secure ROM, which includes a library to
enable InstaSPIN-FOC™. See Device Comparison for more information.
The Embedded Real-Time Analysis and Diagnostic (ERAD) module enhances the debug and system
analysis capabilities of the device by providing additional hardware breakpoints and counters for profiling.
4
TMS320F280049
,
TMS320F280049C
TMS320F280048
,
TMS320F280048C
,
TMS320F280045
TMS320F280041, TMS320F280041C, TMS320F280040, TMS320F280040C
SPRS945C –JANUARY 2017–REVISED DECEMBER 2017
www.ti.com
Submit Documentation Feedback
Product Folder Links: TMS320F280049 TMS320F280049C TMS320F280048 TMS320F280048C TMS320F280045
TMS320F280041 TMS320F280041C TMS320F280040 TMS320F280040C
Device Overview Copyright © 2017, Texas Instruments Incorporated
(1) For more information on these devices, see Mechanical, Packaging, and Orderable Information.
Device Information
(1)
PART NUMBER PACKAGE BODY SIZE
TMS320F280049PZ LQFP (100) 14.0 mm × 14.0 mm
TMS320F280049CPZ LQFP (100) 14.0 mm × 14.0 mm
TMS320F280045PZ LQFP (100) 14.0 mm × 14.0 mm
TMS320F280041PZ LQFP (100) 14.0 mm × 14.0 mm
TMS320F280041CPZ LQFP (100) 14.0 mm × 14.0 mm
TMS320F280049PM LQFP (64) 10.0 mm × 10.0 mm
TMS320F280049CPM LQFP (64) 10.0 mm × 10.0 mm
TMS320F280048PM LQFP (64) 10.0 mm × 10.0 mm
TMS320F280048CPM LQFP (64) 10.0 mm × 10.0 mm
TMS320F280045PM LQFP (64) 10.0 mm × 10.0 mm
TMS320F280041PM LQFP (64) 10.0 mm × 10.0 mm
TMS320F280041CPM LQFP (64) 10.0 mm × 10.0 mm
TMS320F280040PM LQFP (64) 10.0 mm × 10.0 mm
TMS320F280040CPM LQFP (64) 10.0 mm × 10.0 mm
TMS320F280049RSH VQFN (56) 7.0 mm × 7.0 mm
TMS320F280049CRSH VQFN (56) 7.0 mm × 7.0 mm
TMS320F280045RSH VQFN (56) 7.0 mm × 7.0 mm
TMS320F280041RSH VQFN (56) 7.0 mm × 7.0 mm
TMS320F280041CRSH VQFN (56) 7.0 mm × 7.0 mm
Global Shared RAM - Parity
32KW (64KB)
C28x
TMU+FPU+VCU-I
M0 - 1KW (2KB)
M1 - 1KW (2KB)
Boot - 64KW (128KB)
Flash - ECC
C28x RAM - ECC
ePIE
CPU Timer0
CPU Timer1
CPU Timer2
10 MHz INTOSC1, INTOSC2
10–20 MHz Crystal Oscillator
Missing Clock Detect
PLL
CLA
(Type 2)
CLA MSG RAM - Parity
DMA
(6 Channels)
3x 12-Bit ADC
8x ePWM
(16 Hi-Res Channels)
7x eCAP
(2 HRCAP Channels)
2x eQEP
(CW/CCW Support)
4x SD Filters
1x I2C
7x CMPSS
2x Buffered DAC
7x PGA
1x PMBUS
2x SPI
LS0–LS7
8x (2KW [4KB])
GS0–GS3
4x (8KW
[16KB])
2x SCI
2x CAN
C28x ROM
DCSM OTP
Secure - 32KW (64KB)
Flash BANK0 - 16 Sectors
64KW (128KB)
Flash BANK1 - 16 Sectors
64KW (128KB)
CLA to CPU - 128W
CPU to CLA - 128W
CLA ROM
Local Shared RAM - Parity
16KW (32KB)
PF1 PF3 PF4 PF2 PF9PF7
Result
Config.
Program
48KW (96KB)
Data
4KW (8KB)
Copyright © 2017, Texas Instruments Incorporated
Config.
Data
1x FSI RX
1x FSI TX
NMI
Watchdog
Windowed
Watchdog
1x LIN
PF8
GPIO
XBAR
5
TMS320F280049
,
TMS320F280049C
TMS320F280048
,
TMS320F280048C
,
TMS320F280045
TMS320F280041, TMS320F280041C, TMS320F280040, TMS320F280040C
www.ti.com
SPRS945C –JANUARY 2017–REVISED DECEMBER 2017
Submit Documentation Feedback
Product Folder Links: TMS320F280049 TMS320F280049C TMS320F280048 TMS320F280048C TMS320F280045
TMS320F280041 TMS320F280041C TMS320F280040 TMS320F280040C
Device OverviewCopyright © 2017, Texas Instruments Incorporated
1.4 Functional Block Diagram
Figure 1-1 shows the CPU system and associated peripherals.
Figure 1-1. Functional Block Diagram
剩余216页未读,继续阅读
资源评论
不觉明了
- 粉丝: 3146
- 资源: 5404
上传资源 快速赚钱
- 我的内容管理 展开
- 我的资源 快来上传第一个资源
- 我的收益 登录查看自己的收益
- 我的积分 登录查看自己的积分
- 我的C币 登录后查看C币余额
- 我的收藏
- 我的下载
- 下载帮助
安全验证
文档复制为VIP权益,开通VIP直接复制
信息提交成功