Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Description (continued).................................................. 2
5 Revision History.............................................................. 2
6 Device Comparison......................................................... 3
7 Pin Configuration and Functions...................................4
8 Specifications................................................................ 11
8.1 Absolute Maximum Ratings...................................... 11
8.2 ESD Ratings............................................................. 12
8.3 Recommended Operating Conditions.......................12
8.4 Thermal Information..................................................13
8.5 Electrical Characteristics: DC Specifications............ 14
8.6 Electrical Characteristics: Power Consumption........ 16
8.7 Electrical Characteristics: AC Specifications............ 19
8.8 Timing Requirements................................................24
8.9 Switching Characteristics..........................................25
8.10 Typical Characteristics............................................ 27
9 Detailed Description......................................................51
9.1 Overview................................................................... 51
9.2 Functional Block Diagram......................................... 52
9.3 Feature Description...................................................55
9.4 Device Functional Modes..........................................75
9.5 Programming............................................................ 96
10 Application and Implementation.............................. 136
10.1 Application Information......................................... 136
10.2 Typical Applications.............................................. 136
10.3 Initialization Set Up............................................... 142
11 Power Supply Recommendations............................143
11.1 Power Sequencing................................................ 145
12 Layout.........................................................................146
12.1 Layout Guidelines................................................. 146
12.2 Layout Example.................................................... 147
13 Device and Documentation Support........................150
13.1 Device Support..................................................... 150
13.2 Receiving Notification of Documentation Updates150
13.3 Support Resources............................................... 150
13.4 Trademarks...........................................................150
13.5 Electrostatic Discharge Caution............................150
13.6 Glossary................................................................150
14 Mechanical, Packaging, and Orderable
Information.................................................................. 150
4 Description (continued)
A number of clocking features are included to relax system hardware requirements, such as an internal phase-
locked loop (PLL) with integrated voltage-controlled oscillator (VCO) to generate the sampling clock. Four clock
outputs are provided to clock the logic and SerDes of the FPGA or ASIC. A timestamp input and output is
provided for pulsed systems.
JESD204C serialized interface decreases system size by reducing the amount of printed circuit board (PCB)
routing. Interface modes support from 2 to 8 lanes (dual and quad channel devices) or 1 to 4 lanes (for the
single channel device), with SerDes baud-rates up to 17.16 Gbps, to allow the optimal configuration for each
application.
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
DATE REVISION NOTES
October 2021 * Initial release.
ADC12QJ1600, ADC12DJ1600, ADC12SJ1600
SBASAE0 – OCTOBER 2021
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