2
SRG8
8
10
7
15
2
EN3
C2
R
C1
1D
G
RCK
CLR
SRCK
SER IN
3
5
4
11
6
13
12
9
14
DRAIN0
DRAIN1
DRAIN2
DRAIN3
DRAIN4
DRAIN5
DRAIN6
DRAIN7
SER OUT
2
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TPIC6C596
SLIS093D –MARCH 2000–REVISED MARCH 2015
TPIC6C596 Power Logic 8-Bit Shift Register
1 Features 3 Description
The TPIC6C596 device is a monolithic, medium-
1
• Low R
DS(on)
, 7 Ω (Typical)
voltage, low-current, 8-bit shift register designed for
• Avalanche Energy, 30 mJ
use in systems that require relatively moderate load
• Eight Power DMOS Transistor Outputs of 100-mA
power such as LEDs. The device contains a built-in
Continuous Current
voltage clamp on the outputs for inductive transient
protection. Power driver applications include relays,
• 250-mA Current Limit Capability
solenoids, and other low-current or medium-voltage
• ESD Protection, 2500 V
loads.
• Output Clamp Voltage, 33 V
This device contains an 8-bit serial-in, parallel-out
• Enhanced Cascading for Multiple Stages
shift register that feeds an 8-bit D-type storage
• All Registers Cleared With Single Input
register. Data transfers through both the shift and
storage registers on the rising edge of the shift
• Low Power Consumption
register clock (SRCK) and the register clock (RCK),
respectively. The storage register transfers data to
2 Applications
the output buffer when shift register clear (CLR) is
• Instrumentation Clusters
high. When CLR is low, all registers in the device are
cleared. When output enable (G) is held high, all data
• Tell-Tale Lamps
in the output buffers is held low and all drain outputs
• LED Illumination and Controls
are off. When G is held low, data from the storage
• Automotive Relay or Solenoids Drivers
register is transparent to the output buffers. When
data in the output buffers is low, the DMOS transistor
Logic Symbol
outputs are off. When data is high, the DMOS
transistor outputs have sink-current capability.
The serial output (SER OUT) is clocked out of the
device on the falling edge of SRCK to provide
additional hold time for cascaded applications. This
will provide improved performance for applications
where clock signals may be skewed, devices are not
located near one another, or the system must tolerate
electromagnetic interference.
Outputs are low-side, open-drain DMOS transistors
with output ratings of 33 V and 100 mA continuous
sink-current capability. Each output provides a 250-
mA maximum current limit at T
C
= 25°C. The current
limit decreases as the junction temperature increases
for additional device protection. The device also
provides up to 2500 V of ESD protection when tested
using the human body model and the 200-V machine
model.
The TPIC6C596 device is characterized for operation
This symbol is in accordance with
over the operating case temperature range of −40°C
ANSI/IEEE Std 91-1984 and IEC
to 125°C.
Publication 617-12.
Device Information
(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SOIC (16) 9.90 mm × 3.91 mm
TPIC6C596 PDIP (16) 19.30 mm × 6.35 mm
TSSOP (16) 5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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