LM5039
SNVS621D –FEBRUARY 2010–REVISED MARCH 2013
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PIN DESCRIPTIONS (continued)
HTSSOP WQFN
Name Description Application Information
Pin Pin
7 6 CS Current Sense input for current The CS pin is driven by a signal representative of the primary
limit current. A higher threshold (600mV) comparator is used to
implement a fast peak cycle-by-cycle current limit to provide instant
protection to the power converter. A lower threshold (500mV)
comparator is used to implement a slower average current limit that
maintains the balance of the half-bridge capacitor divider voltage. A
50ns blanking time at the CS pin avoids false tripping the current
limit comparators due to leading edge transients.
8 7 SS Soft-start Input An internal 110µA current source charges an external capacitor to
set the soft-start rate. During a current limit restart sequence, the
internal current source is reduced to 1.2µA to increase the delay
before retry.
9 8 DLY Timing programming pin for the LO An external resistor to ground sets the timing for the non-overlap
and HO to SR1 and SR2 outputs. time of HO to SR1 and LO to SR2.
10 9 RES Restart Timer If the current limit is exceeded during any cycle, a 22µA current is
sourced to the RES pin capacitor. If the RES capacitor voltage
reaches 2.5V, the soft-start capacitor will be fully discharged and
then released with a pull-up current of 1.2µA. After the first output
pulse at LO (when SS > COMP offset, typically 1V), the SS pin
charging current will revert to 110µA.
11 11 HB Boost voltage for the HO driver An external diode is required from VCC to HB and an external
capacitor is required from HS to HB to power the HO gate driver.
12 12 HS Switch node Connection common to the transformer and both power switches.
Provides a return path for the HO gate driver.
13 13 HO High side gate drive output. Output of the high side PWM gate driver. Capable of sinking 2A
peak current.
14 14 LO Low side gate drive output. Output of the low side PWM gate driver. Capable of sinking 2A peak
current.
15 15 PGND Power Ground Connect directly to Analog Ground.
16 16 VCC Output of the high voltage start-up If an auxiliary winding raises the voltage on this pin above the
regulator. The VCC voltage is regulation setpoint, the Start-up Regulator will shutdown, thus
regulated to 7.6V. reducing the internal power dissipation.
17 17 SR2 Synchronous rectifier driver output. Control output of the synchronous FET gate. Capable of 0.5A peak
current.
18 18 SR1 Synchronous rectifier driver output. Control output of the synchronous FET gate. Capable of 0.5A peak
current.
19 19 REF Output of 5V Reference Typical output current is 20mA. Locally decoupled with a 0.1µF
capacitor.
20 21 VIN Input voltage source Input to the Start-up Regulator. Operating input range is 13V to
100V with transient capability to 105V. For power sources outside of
this range, the LM5039 can be biased directly at VCC by an
external regulator.
EP EP EP Exposed Pad, underside of No electrical contact. Connect to system ground plane for reduced
package thermal resistance.
1 NC No connection No electrical contact.
10 NC No connection No electrical contact.
20 NC No connection No electrical contact.
22 NC No connection No electrical contact.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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