PWM.rar_2812 pwm .RAR_DSP PWM生成_TMS320F2812_TMS320F2812 pwm_pwm

// // Lab5 : TMS320F2812 Teaching CD ROM // (C) Frank Bormann // //########################################################################### // // FILE: Lab5.c // // TITLE: DSP28 T1PWM - output to generate a (square wave)note , // CPU Timer0 ISR every 50 ms // Watchdog active , served in ISR and main-loop // //########################################################################### // // Ver | dd mmm yyyy | Who | Description of changes // =====|=============|======|=============================================== // 2.0 | 11 Nov 2003 | F.B. | adapted to header-files Version 1.00 //########################################################################### #include "DSP281x_Device.h" // Prototype statements for functions found within this file. void Gpio_select(void); void SpeedUpRevA(void); void InitSystem(void); interrupt void cpu_timer0_isr(void); // Prototype for Timer 0 Interrupt Service Routine void main(void) { unsigned int i; unsigned long time_stamp; int frequency[8]={2219,1973,1776,1665,1480,1332,1184,1110}; InitSystem(); // Initialize the DSP's core Registers // Speed_up the silicon A Revision. // No need to call this function for Rev. C later silicon versions Gpio_select(); // Setup the GPIO Multiplex Registers InitPieCtrl(); // Function Call to init PIE-unit ( code : DSP281x_PieCtrl.c) InitPieVectTable(); // Function call to init PIE vector table ( code : DSP281x_PieVect.c ) // re-map PIE - entry for Timer 0 Interrupt EALLOW; // This is needed to write to EALLOW protected registers PieVectTable.TINT0 = &cpu_timer0_isr; EDIS; // This is needed to disable write to EALLOW protected registers InitCpuTimers(); // Configure CPU-Timer 0 to interrupt every 50 ms: // 150MHz CPU Freq, 50000 �seconds interrupt period ConfigCpuTimer(&CpuTimer0, 150, 50000); // Enable TINT0 in the PIE: Group 1 interrupt 7 PieCtrlRegs.PIEIER1.bit.INTx7 = 1; // Enable CPU INT1 which is connected to CPU-Timer 0: IER = 1; // Enable global Interrupts and higher priority real-time debug events: EINT; // Enable Global interrupt INTM ERTM; // Enable Global realtime interrupt DBGM // Configure EVA // Assumes EVA Clock is already enabled in InitSysCtrl(); // Drive T1PWM / T2PWM by T1/T2 - logic EvaRegs.GPTCONA.bit.TCMPOE = 1; // Polarity of GP Timer 1 Compare = Active low EvaRegs.GPTCONA.bit.T1PIN = 1; EvaRegs.T1CON.all = 0x1702; // Setup T1 count up mode CpuTimer0Regs.TCR.bit.TSS = 0; i = 0; time_stamp = 0; while(1) { if ((CpuTimer0.InterruptCount%4)==0) { EALLOW; SysCtrlRegs.WDKEY = 0xAA; // and serve watchdog #2 EDIS; } if ((CpuTimer0.InterruptCount - time_stamp)>10) { time_stamp = CpuTimer0.InterruptCount; if(i<7) EvaRegs.T1PR = frequency[i++]; else EvaRegs.T1PR = frequency[14-i++]; EvaRegs.T1CMPR = EvaRegs.T1PR/2; EvaRegs.T1CON.bit.TENABLE = 1; if (i>=14) i=0; } } } void Gpio_select(void) { EALLOW; GpioMuxRegs.GPAMUX.all = 0x0; // all GPIO port Pin's to I/O GpioMuxRegs.GPAMUX.bit.T1PWM_GPIOA6 = 1; // T1PWM active GpioMuxRegs.GPBMUX.all = 0x0; GpioMuxRegs.GPDMUX.all = 0x0; GpioMuxRegs.GPFMUX.all = 0x0; GpioMuxRegs.GPEMUX.all = 0x0; GpioMuxRegs.GPGMUX.all = 0x0; GpioMuxRegs.GPADIR.all = 0x0; // GPIO PORT as input GpioMuxRegs.GPBDIR.all = 0x00FF; // GPIO Port B15-B8 input , B7-B0 output GpioMuxRegs.GPDDIR.all = 0x0; // GPIO PORT as input GpioMuxRegs.GPEDIR.all = 0x0; // GPIO PORT as input GpioMuxRegs.GPFDIR.all = 0x0; // GPIO PORT as input GpioMuxRegs.GPGDIR.all = 0x0; // GPIO PORT as input GpioMuxRegs.GPAQUAL.all = 0x0; // Set GPIO input qualifier values to zero GpioMuxRegs.GPBQUAL.all = 0x0; GpioMuxRegs.GPDQUAL.all = 0x0; GpioMuxRegs.GPEQUAL.all = 0x0; EDIS; } void InitSystem(void) { EALLOW; SysCtrlRegs.WDCR= 0x00AF; // Setup the watchdog // 0x00E8 to disable the Watchdog , Prescaler = 1 // 0x00AF to NOT disable the Watchdog, Prescaler = 64 SysCtrlRegs.SCSR = 0; // Watchdog generates a RESET SysCtrlRegs.PLLCR.bit.DIV = 10; // Setup the Clock PLL to multiply by 5 SysCtrlRegs.HISPCP.all = 0x1; // Setup Highspeed Clock Prescaler to divide by 2 SysCtrlRegs.LOSPCP.all = 0x2; // Setup Lowspeed CLock Prescaler to divide by 4 // Peripheral clock enables set for the selected peripherals. SysCtrlRegs.PCLKCR.bit.EVAENCLK=1; SysCtrlRegs.PCLKCR.bit.EVBENCLK=0; SysCtrlRegs.PCLKCR.bit.SCIAENCLK=0; SysCtrlRegs.PCLKCR.bit.SCIBENCLK=0; SysCtrlRegs.PCLKCR.bit.MCBSPENCLK=0; SysCtrlRegs.PCLKCR.bit.SPIENCLK=0; SysCtrlRegs.PCLKCR.bit.ECANENCLK=0; SysCtrlRegs.PCLKCR.bit.ADCENCLK=0; EDIS; } interrupt void cpu_timer0_isr(void) { CpuTimer0.InterruptCount++; // Serve the watchdog every Timer 0 interrupt EALLOW; SysCtrlRegs.WDKEY = 0x55; // Serve watchdog #1 EDIS; // Acknowledge this interrupt to receive more interrupts from group 1 PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; } //=========================================================================== // End of SourceCode. //===========================================================================