FPGA中iq路信号功率统计_RSSI.rar
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2020-04-19
13:55:14
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FPGA中iq路信号功率统计_RSSI.rar （80个子文件） 
FPGA中iq路信号功率统计_RSSI ip i_add_q xbip_addsub_v3_0_1 hdl 
xbip_addsub_v3_0.vhd 9KB xbip_addsub_v3_0_vh_rfs.vhd 27KB xbip_dsp48_wrapper_v3_0_4 hdl xbip_dsp48_wrapper_v3_0_vh_rfs.vhd 139KB i_add_q_ooc.xdc 2KB xbip_utils_v3_0_5 hdl xbip_utils_v3_0_vh_rfs.vhd 154KB sim i_add_q.vhd 5KB doc 
c_addsub_v12_0_changelog.txt 5KB i_add_q.xci 10KB i_add_q.dcp 46KB synth i_add_q.vhd 6KB i_add_q_stub.v 1KB i_add_q_sim_netlist.v 51KB xbip_dsp48_addsub_v3_0_1 hdl xbip_dsp48_addsub_v3_0.vhd 11KB xbip_dsp48_addsub_v3_0_vh_rfs.vhd 85KB c_reg_fd_v12_0_1 hdl c_reg_fd_v12_0_vh_rfs.vhd 32KB c_reg_fd_v12_0.vhd 9KB xbip_pipe_v3_0_1 hdl xbip_pipe_v3_0_vh_rfs.vhd 24KB xbip_pipe_v3_0.vhd 8KB c_addsub_v12_0_8 hdl c_addsub_v12_0.vhd 12KB c_addsub_v12_0_vh_rfs.vhd 384KB i_add_q_stub.vhdl 1KB i_add_q.vho 3KB i_add_q.xml 70KB i_add_q.veo 3KB i_add_q_sim_netlist.vhdl 70KB pow_cal_dsp xbip_dsp48_wrapper_v3_0_4 hdl xbip_dsp48_wrapper_v3_0_vh_rfs.vhd 139KB pow_cal_dsp.dcp 94KB pow_cal_dsp_sim_netlist.vhdl 152KB pow_cal_dsp.veo 3KB pow_cal_dsp_ooc.xdc 2KB pow_cal_dsp.vho 3KB pow_cal_dsp.xml 377KB xbip_utils_v3_0_5 hdl xbip_utils_v3_0_vh_rfs.vhd 154KB sim pow_cal_dsp.vhd 9KB doc xbip_dsp48_macro_v3_0_changelog.txt 5KB pow_cal_dsp_sim_netlist.v 110KB pow_cal_dsp.xci 23KB synth pow_cal_dsp.vhd 11KB pow_cal_dsp_stub.v 1KB pow_cal_dsp_stub.vhdl 1KB xbip_dsp48_macro_v3_0_11 hdl xbip_dsp48_macro_v3_0.vhd 26KB xbip_dsp48_macro_v3_0_vh_rfs.vhd 325KB xbip_pipe_v3_0_1 hdl xbip_pipe_v3_0_vh_rfs.vhd 24KB xbip_pipe_v3_0.vhd 8KB src_gen_q src_gen_q.veo 3KB src_gen_q_sim_netlist.vhdl 46KB dist_mem_gen_v8_0_9 hdl dist_mem_gen_v8_0.vhd 17KB dist_mem_gen_v8_0_vhsyn_rfs.vhd 169KB simulation dist_mem_gen_v8_0.vhd 27KB src_gen_q.vho 3KB src_gen_q_stub.vhdl 1KB sim src_gen_q.vhd 6KB doc dist_mem_gen_v8_0_changelog.txt 4KB src_gen_q.mif 166KB src_gen_q.xci 11KB synth src_gen_q.vhd 7KB src_gen_q_ooc.xdc 3KB src_gen_q.xml 55KB src_gen_q.dcp 29KB src_gen_q_sim_netlist.v 35KB src_gen_q_stub.v 1KB src_gen_i dist_mem_gen_v8_0_9 hdl dist_mem_gen_v8_0.vhd 17KB dist_mem_gen_v8_0_vhsyn_rfs.vhd 169KB simulation dist_mem_gen_v8_0.vhd 27KB src_gen_i_stub.vhdl 1KB src_gen_i.veo 3KB src_gen_i_sim_netlist.vhdl 74KB src_gen_i.xml 55KB src_gen_i.vho 3KB sim src_gen_i.vhd 6KB doc dist_mem_gen_v8_0_changelog.txt 4KB src_gen_i.mif 166KB src_gen_i_stub.v 1KB src_gen_i.dcp 38KB src_gen_i_sim_netlist.v 57KB synth src_gen_i.vhd 7KB src_gen_i.xci 11KB src_gen_i_ooc.xdc 3KB Pow_cal.v 4KB tb_pow_cal.v 2KB资源评论
