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TI-BQ500101.pdf
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TI-BQ500101.pdf
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V
SW
Current (A)
Efficiency (%)
Power Loss (W)
0 2 4 6 8 10
60 0
65 0.4
70 0.8
75 1.2
80 1.6
85 2
90 2.4
95 2.8
100 3.2
D001
V
DD
= 5 V
V
IN
= 10 V
L
SW
= 6 PH
f
SW
= 130 kHz
T
A
= 25qC
Duty Cycle = 50%
Efficiency (%)
Power Loss (W)
bq500101
(Voltage Regulation)
19 V
bq500100
(Current Sense
Monitor)
bq500101
bq500101
bq501210
(Wireless Power
Transmitter Controller)
Product
Folder
Sample &
Buy
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLPS585
bq500101
ZHCSEQ6 –MARCH 2016
bq500101 NexFET™功功率率级级
1
1 特特性性
1
• 5A 电流时系统效率达 98%
• 最大额定持续电流 10A,峰值 15A
• 高频工作(高达 600kHz)
• 高密度小外形尺寸无引线 (SON) 3.5mm x 4.5mm
封装
• 超低电感封装
• 系统已优化的印刷电路板 (PCB) 封装
• 3.3V 和 5V 脉宽调制 (PWM) 信号兼容
• 输入电压高达 24V
• 集成型自举二极管
• 击穿保护
• 符合 RoHS 绿色环保标准-无铅引脚镀层
• 无卤素
• 包含高效栅极驱动器和场效应管 (FET) 的优化型功
率级
• 针对 15W 无线电源发射器设计进行了优化
2 应应用用
• 用于 15W 或 5W 系统的无线电源发射器,符合
WPC (Qi) 1.2 规范
• 专用无线充电器和发射器
• 以无线方式供电的工业和医疗系统
• 更多相关信息,请访问 www.ti.com/wirelesspower
3 说说明明
bq500101 NexFET™功率级针对涵盖 WPC v1.2 中等
功率规范的无线电源 应用 进行了优化。该器件既可用
于固定频率发射器类型中的电源轨电压控制,也可用于
固定频率和频率可变两种发射器类型中的线圈驱动器。
这个组合在小型 3.5mm x 4.5mm 外形尺寸封装中实现
具有高电流、高效率和高速开关功能的器件。此外,印
刷电路板 (PCB) 封装已经过优化,可帮助减少设计时
间并简化总体系统设计的完成。
器器件件信信息息
(1)
订订货货编编号号 封封装装 封封装装尺尺寸寸((标标称称值值))
bq500101 DPC (9) 3.5mm x 4.5mm
(1) 要了解所有可用封装,请见数据表末尾的可订购产品附录。
空白
应应用用图图表表 典典型型功功率率级级效效率率与与功功率率损损耗耗
2
bq500101
ZHCSEQ6 –MARCH 2016
www.ti.com.cn
Copyright © 2016, Texas Instruments Incorporated
目目录录
1 特特性性.......................................................................... 1
2 应应用用.......................................................................... 1
3 说说明明.......................................................................... 1
4 修修订订历历史史记记录录 ........................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
7 Detailed Description.............................................. 6
7.1 Overview ................................................................... 6
7.2 Functional Block Diagram ......................................... 6
7.3 Feature Description................................................... 7
8 Application and Implementation .......................... 8
8.1 Application Information.............................................. 8
8.2 Typical Application ................................................... 8
8.3 System Example ..................................................... 11
9 Layout ................................................................... 13
9.1 Layout Guidelines ................................................... 13
9.2 Layout Example ...................................................... 13
9.3 Thermal Considerations.......................................... 14
10 器器件件和和文文档档支支持持 ..................................................... 15
10.1 商标 ....................................................................... 15
10.2 静电放电警告......................................................... 15
10.3 Glossary................................................................ 15
11 机机械械、、封封装装和和可可订订购购信信息息....................................... 16
11.1 机械制图................................................................ 16
11.2 建议印刷电路板 (PCB) 焊盘图案........................... 17
11.3 建议模板开口......................................................... 17
4 修修订订历历史史记记录录
日日期期 修修订订版版本本 注注释释
2016 年 3 月 * 首次发布。
3
bq500101
www.ti.com.cn
ZHCSEQ6 –MARCH 2016
Copyright © 2016, Texas Instruments Incorporated
5 Pin Configuration and Functions
SON 3.5 × 4.5 mm
(Top View)
Pin Functions
PIN
DESCRIPTION
NO. NAME
1 V
DD
Supply voltage to gate drivers and internal circuitry.
2 V
DD
Supply voltage to gate drivers and internal circuitry.
3 P
GND
Power ground, needs to be connected to Pin 9 and PCB
4 V
SW
Voltage switching node – pin connection to the inductor.
5 V
IN
Input voltage pin. Connect input capacitors close to this pin.
6 BOOT_R Bootstrap capacitor C
BOOT
connections. Connect a minimum 0.1 µF 16 V X5R, ceramic cap C
BOOT
from BOOT to
BOOT_R pins. The bootstrap capacitor provides the charge to turn on the Control FET. The bootstrap diode is
integrated. Boot_R is internally connected to V
SW
.
7 BOOT
8 PWM
Pulse Width modulated tri-state input from external controller. Logic Low sets Control FET gate low and Sync FET
gate high. Logic High sets Control FET gate high and Sync FET gate Low. Open or High Z sets both MOSFET gates
low if greater than the tri-state shutdown hold-off time (t
3HT
)
9 P
GND
Power ground
4
bq500101
ZHCSEQ6 –MARCH 2016
www.ti.com.cn
Copyright © 2016, Texas Instruments Incorporated
(1) Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to Absolute Maximum rated conditions for extended periods may affect device reliability.
6 Specifications
6.1 Absolute Maximum Ratings
(1)
T
A
= 25°C (unless otherwise noted)
MIN MAX UNIT
V
IN
to P
GND
–0.3 30 V
V
SW
to P
GND
, V
IN
to V
SW
–0.3 30 V
V
SW
to P
GND
, V
IN
to V
SW
(<10 ns) –7 33 V
V
DD
to P
GND
–0.3 6 V
PWM –0.3 6 V
BOOT to P
GND
–0.3 35 V
BOOT to P
GND
(<10 ns) –2 38 V
BOOT to BOOT_R –0.3 6 V
BOOT to BOOT_R (duty cycle <0.2%) 8 V
P
D
Power dissipation 8 W
T
J
Operating temperature –40 150 °C
T
stg
Storage temperature –55 150 °C
(1) JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings
VALUE UNIT
V
(ESD)
Electrostatic discharge
Human body model (HBM)
(1)
±2000
V
Charged device model (CDM)
(2)
±500
(1) Operating at high V
IN
can create excessive AC voltage overshoots on the switch node (V
SW
) during MOSFET switching transients. For
reliable operation, the switch node (V
SW
) to ground voltage must remain at or below the Absolute Maximum Ratings.
(2) Measurement made with six 10 µF (TDK C3216X5R1C106KT or equivalent) ceramic capacitors placed across V
IN
to P
GND
pins.
(3) System conditions as defined in Note 2. Peak V
SW
Current is applied for t
p
= 10 ms, duty cycle ≤ 1%
6.3 Recommended Operating Conditions
T
A
= 25° (unless otherwise noted)
MIN MAX UNIT
V
DD
Gate drive voltage 4.5 5.5 V
V
IN
Input supply voltage
(1)
24 V
I
SW
Continuous V
SW
current V
IN
= 10 V, V
DD
= 5 V, Duty cycle = 50%,
ƒ
SW
= 130 kHz, L
SW
= 6 µH
(2)
10 A
I
SW-PK
Peak V
SW
current
(3)
15 A
ƒ
SW
Switching frequency C
BOOT
= 0.1 µF (min) 600 kHz
On time duty cycle 85%
Minimum PWM on time 40 ns
Operating temperature –40 125 °C
(1) R
θJC
is determined with the device mounted on a 1 inch² (6.45 cm²), 2 oz (0.071 mm thick) Cu pad on a 1.5 inch x 1.5 inch, 0.06 inch
(1.52 mm) thick FR4 board.
(2) R
θJB
value based on hottest board temperature within 1mm of the package.
6.4 Thermal Information
T
A
= 25°C (unless otherwise noted)
THERMAL METRIC MIN TYP MAX UNIT
R
θJC
Junction-to-case (top of package) thermal resistance
(1)
22.8
°C/W
R
θJB
Junction-to-board thermal resistance
(2)
2.5
5
bq500101
www.ti.com.cn
ZHCSEQ6 –MARCH 2016
Copyright © 2016, Texas Instruments Incorporated
(1) Specified by design
6.5 Electrical Characteristics
T
A
= 25°C, V
DD
= POR to 5.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P
LOSS
Power
loss
(1)
V
IN
= 10 V, V
DD
= 5 V, I
SW
= 5 A, ƒ
SW
= 130 kHz,
L
SW
= 6 µH , T
J
= 25°C, Duty Cycle = 50%
0.53 W
Power
loss
(1)
V
IN
= 10 V, V
DD
= 5 V, I
SW
= 5 A, ƒ
SW
= 130 kHz,
L
SW
= 6 µH , T
J
= 125°C, Duty Cycle = 50%
0.68 W
V
IN
I
Q
V
IN
quiescent current PWM = Floating, V
DD
= 5 V, V
IN
= 24 V 1 µA
V
DD
I
DD
Standby supply current PWM = Float 130 µA
I
DD
Operating supply current PWM = 50% Duty cycle, ƒ
SW
= 130 kHz 2 mA
POWER-ON RESET AND UNDERVOLTAGE LOCKOUT
V
DD
Rising Power-on reset 4.15 V
V
DD
Falling UVLO 3.7 V
Hysteresis 0.2 V
PWM I/O SPECIFICATIONS
R
I
Input impedance
Pull up to V
DD
1700
kΩ
Pull down (to GND) 800
V
IH
Logic level high 2.65
V
V
IL
Logic level low 0.6
V
IH
Hysteresis 0.2
V
TS
Tri-state voltage 1.3 2
t
THOLD(off1)
Tri-state activation time
(falling) PWM
60
ns
t
THOLD(off2)
Tri-state activation time (rising)
PWM
60
t
3RD(PWM)
Tri-state exit time PWM
(1)
100 ns
BOOTSTRAP SWITCH
V
FBST
Forward voltage I
F
= 10 mA 120 240 mV
I
RLEAK
Reverse leakage
(1)
V
BOOT
– V
DD
= 25 V 2 µA
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