FSP Configuration
Board "Custom User Board (Any Device)"
R7FA4M2AD3CFP
part_number: R7FA4M2AD3CFP
rom_size_bytes: 524288
ram_size_bytes: 131072
data_flash_size_bytes: 8192
package_style: LQFP
package_pins: 100
RA4M2
series: 4
RA4M2 Family
Security: Exceptions: Exception Response: Non-Maskable Interrupt
Security: Exceptions: BusFault, HardFault, and NMI Target: Secure State
Security: System Reset Request Accessibility: Secure State
Security: Exceptions: Prioritize Secure Exceptions: Disabled
Security: Cache Accessibility: Both Secure and Non-Secure State
Security: System Reset Status Accessibility: Both Secure and Non-Secure State
Security: Battery Backup Accessibility: Both Secure and Non-Secure State
Security: SRAM Accessibility: SRAM Protection: Both Secure and Non-Secure State
Security: SRAM Accessibility: SRAM ECC: Both Secure and Non-Secure State
Security: SRAM Accessibility: Standby RAM: Regions 7-0 are all Secure.
Security: BUS Accessibility: Bus Security Attribution Register A: Both Secure and Non-Secure State
Security: BUS Accessibility: Bus Security Attribution Register B: Both Secure and Non-Secure State
Security: Uninitialized Non-Secure Application Fallback: Enable Uninitialized Non-Secure Application Fallback
Startup C-Cache Line Size: 32 Bytes
OFS0 register settings: Independent WDT: Start Mode: IWDT is Disabled
OFS0 register settings: Independent WDT: Timeout Period: 2048 cycles
OFS0 register settings: Independent WDT: Dedicated Clock Frequency Divisor: 128
OFS0 register settings: Independent WDT: Window End Position: 0% (no window end position)
OFS0 register settings: Independent WDT: Window Start Position: 100% (no window start position)
OFS0 register settings: Independent WDT: Reset Interrupt Request Select: Reset is enabled
OFS0 register settings: Independent WDT: Stop Control: Stop counting when in Sleep, Snooze mode, or Software Standby
OFS0 register settings: WDT: Start Mode Select: Stop WDT after a reset (register-start mode)
OFS0 register settings: WDT: Timeout Period: 16384 cycles
OFS0 register settings: WDT: Clock Frequency Division Ratio: 128
OFS0 register settings: WDT: Window End Position: 0% (no window end position)
OFS0 register settings: WDT: Window Start Position: 100% (no window start position)
OFS0 register settings: WDT: Reset Interrupt Request: Reset
OFS0 register settings: WDT: Stop Control: Stop counting when entering Sleep mode
OFS1 register settings: Voltage Detection 0 Circuit Start: Voltage monitor 0 reset is disabled after reset
OFS1 register settings: Voltage Detection 0 Level: 2.80 V
OFS1 register settings: HOCO Oscillation Enable: HOCO oscillation is disabled after reset
Block Protection Settings (BPS): BPS0:
Permanent Block Protection Settings (PBPS): PBPS0:
Clocks: HOCO FLL Function: Disabled
Main Oscillator Wait Time: 8163 cycles
RA Common
Main stack size (bytes): 0x400
Heap size (bytes): 0
MCU Vcc (mV): 3300
Parameter checking: Disabled
Assert Failures: Return FSP_ERR_ASSERTION
Error Log: No Error Log
Clock Registers not Reset Values during Startup: Disabled
Main Oscillator Populated: Populated
PFS Protect: Enabled
C Runtime Initialization : Enabled
Early BSP Initialization : Disabled
Main Oscillator Clock Source: Crystal or Resonator
Subclock Populated: Populated
Subclock Drive (Drive capacitance availability varies by MCU): Standard/Normal mode
Subclock Stabilization Time (ms): 1000
Clocks
XTAL 12000000Hz
HOCO 20MHz
PLL Src: XTAL
PLL Div /1
PLL Mul x10.0
PLL2 Disabled
PLL2 Div /2
PLL2 Mul x20.0
Clock Src: PLL
CLKOUT Disabled
UCLK Disabled
ICLK Div /2
PCLKA Div /2
PCLKB Div /4
PCLKC Div /4
PCLKD Div /2
FCLK Div /4
CLKOUT Div /1
UCLK Div /5
Pin Configurations
R7FA4M2AD3CFP.pincfg -> g_bsp_pin_cfg
AVCC0 88 ANALOG0_AVCC0 - - - - - - - - IO "Read only" -
AVSS0 89 ANALOG0_AVSS0 - - - - - - - - IO "Read only" -
P000 100 - - - - Disabled - - "ADC0: AN000; ICU0: IRQ06" - None - -
P001 99 - - - - Disabled - - "ADC0: AN001; ICU0: IRQ07" - None - -
P002 98 - - - - Disabled - - "ADC0: AN002; ICU0: IRQ08" - None - -
P003 97 - - - - Disabled - - "ADC0: AN003" - None - -
P004 96 - - - - Disabled - - "ADC0: AN004; ICU0: IRQ09" - None - -
P005 95 - - - - Disabled - - "ADC0: AN005; ICU0: IRQ10" - None - -
P006 94 - - - - Disabled - - "ADC0: AN006; ICU0: IRQ11" - None - -
P007 93 - - - - Disabled - - "ADC0: AN007" - None - -
P008 92 - - - - Disabled - - "ADC0: AN008; ICU0: IRQ12" - None - -
P013 86 - - - - Disabled - - "ADC0: AN011; ANALOG0: VREFL" - None - -
P014 85 - - - - Disabled - - "ADC0: AN012; DAC0: DA0" - None - -
P015 84 - - - - Disabled - - "ADC0: AN013; DAC1: DA1; ICU0: IRQ13" - None - -
P100 75 SCI0_RXD0 - Low None "Peripheral mode" CMOS None "AGT0: AGTIO0; GPT_POEG0: GTETRGA; GPT5: GTIOC5B; ICU0: IRQ02; QSPI0: QSPCLK; SCI0: RXD0; SCI0: SCL0; SCI1: SCK1" - IO - -
P101 74 SCI0_TXD0 - Low None "Peripheral mode" CMOS None "AGT0: AGTEE0; GPT_POEG1: GTETRGB; GPT5: GTIOC5A; ICU0: IRQ01; QSPI0: QIO1; SCI0: SDA0; SCI0: TXD0; SCI1: CTSRTS1" - IO - -
P102 73 SCI0_SCK0 - Low - "Peripheral mode" CMOS None "ADC0: ADTRG0; AGT0: AGTO0; CAN0: CRX0; GPT_OPS0: GTOWLO; GPT2: GTIOC2B; QSPI0: QIO0; SCI0: SCK0" - IO - -
P103 72 - - - - Disabled - - "AGT2: AGTIO2; CAN0: CTX0; GPT_OPS0: GTOWUP; GPT2: GTIOC2A; QSPI0: QIO3; SCI0: CTSRTS0" - None - -
P104 71 - - - - Disabled - - "AGT2: AGTEE2; GPT_POEG1: GTETRGB; GPT1: GTIOC1B; ICU0: IRQ01; QSPI0: QIO2" - None - -
P105 70 - - - - Disabled - - "AGT2: AGTO2; GPT_POEG0: GTETRGA; GPT1: GTIOC1A; ICU0: IRQ00" - None - -
P106 69 - - - - Disabled - - "AGT0: AGTOB0" - None - -
P107 68 - - - - Disabled - - "AGT0: AGTOA0" - None - -
P108 51 DEBUG0_SWDIO - Low - "Peripheral mode" CMOS None "AGT3: AGTOA3; DEBUG0: SWDIO; DEBUG0: TMS; GPT_OPS0: GTOULO; GPT0: GTIOC0B; SCI9: CTSRTS9; SPI0: SSLA0" - IO - -
P109 52 - - - - Disabled - - "AGT3: AGTOB3; CGC0: CLKOUT; DEBUG0: TDO; DEBUG0: TRACESWO; GPT_OPS0: GTOVUP; GPT1: GTIOC1A; SCI9: SDA9; SCI9: TXD9; SPI0: MOSIA" - None - -
P110 53 - - - - Disabled - - "AGT3: AGTEE3; DEBUG0: TDI; GPT_OPS0: GTOVLO; GPT1: GTIOC1B; ICU0: IRQ03; SCI2: CTSRTS2; SCI9: RXD9; SCI9: SCL9; SPI0: MISOA" - None - -
P111 54 - - - - Disabled - - "AGT5: AGTOA5; GPT3: GTIOC3A; ICU0: IRQ04; SCI2: SCK2; SCI9: SCK9; SPI0: RSPCKA" - None - -
P112 55 - - - - Disabled - - "AGT5: AGTOB5; GPT3: GTIOC3B; QSPI0: QSSL; SCI1: SCK1; SCI2: SDA2; SCI2: TXD2; SPI0: SSLA0; SSI0: SSIBCK0" - None - -
P113 56 - - - - Disabled - - "AGT5: AGTEE5; GPT2: GTIOC2A; SCI2: RXD2; SCI2: SCL2; SSI0: SSILRCK0" - None - -
P114 57 - - - - Disabled - - "AGT5: AGTIO5; GPT2: GTIOC2B; SCI9: CTS9; SSI0: SSIRXD0" - None - -
P115 58 - - - - Disabled - - "GPT4: GTIOC4A; SSI0: SSITXD0" - None - -
P200 40 - - - - Disabled - - "ICU0: NMI" - None - -
P201 39 - - - - Disabled - - "SYSTEM0: MD" - None - -
P205 32 - - - - Disabled - - "AGT1: AGTO1; CGC0: CLKOUT; CTSU0: TS01; GPT_OPS0: GTIV; GPT4: GTIOC4A; ICU0: IRQ01; IIC1: SCL1; SCI4: SDA4; SCI4: TXD4; SCI9: CTSRTS9; SDHI0: SD0DAT3; SPI0: SSLA0; SSI0: SSILRCK0; USB_FS0: USB_OVRCURA" - None - -
P206 31 - - - - Disabled - - "CTSU0: TS02; GPT_OPS0: GTIU; ICU0: IRQ00; IIC1: SDA1; SCI4: RXD4; SCI4: SCL4; SCI9: CTS9; SDHI0: SD0DAT2; SPI0: SSLA1; SSI0: SSIDATA0; USB_FS0: USB_VBUSEN" - None - -
P207 30 - - - - Disabled - - "CTSU0: TSCAP; QSPI0: QSSL; SCI4: SDA4; SCI4: TXD4; SPI0: SSLA2" - None - -
P208 37 - - - - Disabled - - "DEBUG_TRACE0: TDATA3; GPT_OPS0: GTOVLO; QSPI0: QIO3; SDHI0: SD0DAT0"
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温馨提示
瑞萨e2studio(28)----SPI 驱动WS2812灯珠 CSDN文字教程:https://blog.csdn.net/qq_24312945/article/details/134152211 B站教学视频:https://www.bilibili.com/video/BV14u4y1h7u6/ 本文介绍了如何使用瑞萨RA微控制器,结合E2STUDIO配置工具和SPI通讯接口,来驱动和控制WS2812 LED灯带。这是一个集硬件连接、软件配置和编程开发于一体的综合性项目,目标是实现对LED灯带颜色和亮度的精确控制。
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收起资源包目录
瑞萨e2studio(28)-SPI 驱动WS2812灯珠 (210个子文件)
.api_xml 67B
bsp_clocks.c 90KB
r_sci_spi.c 45KB
r_ioport.c 40KB
r_dtc.c 28KB
bsp_security.c 22KB
system.c 20KB
bsp_rom_registers.c 12KB
bsp_delay.c 11KB
bsp_common.c 9KB
startup.c 9KB
bsp_register_protection.c 7KB
bsp_group_irq.c 7KB
bsp_irq.c 6KB
bsp_sbrk.c 6KB
bsp_guard.c 4KB
bsp_io.c 3KB
hal_data.c 3KB
hal_entry.c 3KB
ws2812.c 2KB
pin_data.c 2KB
vector_data.c 1KB
common_data.c 270B
main.c 127B
.cproject 64KB
hal_entry.d 10KB
ws2812.d 10KB
hal_data.d 10KB
main.d 10KB
common_data.d 8KB
r_sci_spi.d 8KB
r_ioport.d 8KB
r_dtc.d 8KB
pin_data.d 8KB
bsp_clocks.d 8KB
bsp_delay.d 8KB
bsp_guard.d 8KB
startup.d 8KB
system.d 8KB
bsp_register_protection.d 8KB
bsp_rom_registers.d 8KB
bsp_group_irq.d 8KB
bsp_security.d 8KB
bsp_common.d 8KB
bsp_sbrk.d 8KB
bsp_irq.d 8KB
bsp_io.d 8KB
vector_data.d 8KB
RA4M2_SPI_WS2812.elf 457KB
R7FA4M2AD.h 1.5MB
core_cm55.h 310KB
core_cm85.h 301KB
core_armv81mml.h 270KB
core_starmc1.h 189KB
core_cm35p.h 185KB
core_cm33.h 185KB
core_armv8mml.h 179KB
core_cm7.h 136KB
core_cm23.h 119KB
core_cm4.h 118KB
core_armv8mbl.h 112KB
core_cm3.h 107KB
core_sc300.h 106KB
bsp_clocks.h 79KB
cmsis_gcc.h 62KB
cmsis_armclang_ltm.h 55KB
core_cm0plus.h 49KB
cmsis_armclang.h 47KB
core_sc000.h 45KB
core_cm1.h 42KB
core_cm0.h 41KB
bsp_feature.h 29KB
cmsis_iccarm.h 28KB
fsp_common_api.h 27KB
cmsis_armcc.h 27KB
bsp_io.h 25KB
pmu_armv8.h 22KB
r_ioport.h 21KB
bsp_common.h 20KB
fsp_features.h 19KB
bsp_elc.h 19KB
r_transfer_api.h 18KB
r_ioport_api.h 18KB
r_spi_api.h 16KB
bsp_mcu_family_cfg.h 16KB
bsp_module_stop.h 13KB
bsp_irq.h 13KB
cachel1_armv7.h 12KB
mpu_armv7.h 11KB
mpu_armv8.h 11KB
bsp_tfu.h 10KB
cmsis_compiler.h 9KB
r_sci_spi.h 6KB
bsp_compiler_support.h 6KB
r_dtc.h 6KB
pac_armv81.h 6KB
bsp_api.h 6KB
bsp_delay.h 5KB
renesas.h 5KB
bsp_group_irq.h 5KB
共 210 条
- 1
- 2
- 3
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