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Acer Aspire 1600 (Wistron Toucan2).pdf
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MAX1631
SYSTEM DC/DC
DCBATOUT
2D5V_S3 or
3D3V_S0
3D3V_S5
3D3V_LANAC
DCBATOUT
INPUT
MAX1715 / CM8501 / FDS9412 /
2SB1184F5 / FDC653N
OUTPUT
DDR_VDD
= 2D5V_S3
DDR_VTT
= 1D25V_S3
DDR & VDDR DC/DC
2D5V_S3
PIC12C509 / MAX1645
DesKtop-CPU
Northwood
2.2~3.06GHz
CLK GEN
DDR * 2
FSB
533/400MHz
2.5V
200MHz/266MHz
PCI Bus
33MHz
MuTIOL 66MHz
16bits/533MBs
TI1520
CardBus
SLOT A/B
TPS2223DB
Power Switch
LPC Bus
33MHz
LPC ROM
Debug Port
AC Link
CODEC
LINE-IN
Line-Out
RJ11
S/PDIF
MDC
Sigmatel
STAC9766
INPUT OUTPUT
SYSTEM DC/DC
CHARGER
DCBATOUT
INPUT
AD+ BT+
OUTPUT
MAX1715 / FDS9412 / APL1085 / G913C /
S2N3906
5V_S5
5V_S3
3D3V_S5
AD+, BT+ UP+5V
POWER BOARD
OUTPUTINPUT
3D3V_S3
3D3V_S0
3D3V_LANAC
1D8V_S5
VCC_VDDR
= 2D5V_S0
5V_S3
5V_S0
1D8V_S0
2D5V_LANAC
MIC-IN
802.11a/b
Mini PCI
Thermal
G768D
HDD ATA100
Primary EIDE
Secondary EIDE
CD-ROM
TV
CRT
LCD
15"
Dual LVDS
Touch Pad
KBC
M38857
Internal KB Floppy
NS87392
SiS645DX
SiS962
ATI M9-P
AGP 4X
ICS:ICS952004AG
DDRBUF:ICS93732
TOUCAN2
ST M50LPW040
PLCC32
LAN MAC
MII
1394 MAC
962 only
PHY
USB 2.0
962 only
1394
conn.
USB*4
1394
W/RTC
Agere FW802A
CPU VCC_CORE DC/DC
DESKTOP CPU
Controller-ISL6301 Drive-ISL6207 * 3 (3 Phase)
DCBATOUT VCC_CORE
9V~20V 1.1Vcore~1.85Vcore
1D2V_VID(Northwood only)
VCC_CORE(Willamette)
VCC_CORE
INPUT OUTPUT
RANGE RANGE
V_VID V_AGTL+ BUS
WILLAMETTE/NORTHWOOD) CPU
3,4
5,6
7,8,9,10
11,12,13
14,15,16
18
18
19
20,21,22,23
28 28
31 29
24
24
25
26
32,33
34 36 36 37
35 35 37
39,40,4144
43,45
26
Project code:
PCB P/N :
REVISION :
L1:
L6:
L4:
L5:
L2:
L3:
PCB LAYER
GND
VCC
Signal 1
Signal 2
Signal 3
L8:
L7:
Signal 5
Signal 4
GND
VRAM*2
K4D263238M-QC40
1D5V_S0
17
30
SIO
(Dummy)
RJ45
LAN
RTL 8100BL
27
27
91.47Y01.001
12/18/2002
INVERTER
38
TOUCAN2
1
BLOCK DIAGRAM
A3
147Wednesday, December 18, 2002
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
REVISION HISTORY
IDSEL
PCI RESOURCE TABLE
PCI IRQDEVICE REQ# / GNT#
Mini-PCI
IEEE 1394
INTERNAL_LAN
USB 2.0
CARDBUS
LPC
AC97
USB 1.1
IDE
EXTERNAL_LAN
AD13
AD18
AD21
AD14
AD14
AD20
AD13
AD13
AD13
INTC#/INTG#
INTD#
INTC#
INTD#/INTE#
INTD#/INTH#
INTA#
INTC#/INTF#
INTH#
REQ1#/GNT1#
REQ3#/GNT3#
REQ4#/GNT4#
AD13
SA-2:
1.GPIO 16,pull-high take it away,(DUMMY R537)
2.CODEC,S/PDIF,10K PULL DOWN (ADD R539)
3.PANEL ID FROM SIO
4.LCDPOWER_S0 FUSE/1A (RAYCHEM)
5.USB .fuse-->RAYCHEM
6.RTL8100.PIN80-->1K-->3D3V
7.FDD POWER RAIL-->1A FUSE
8.CODECP/N UPDATE:71.09766.A0G
9.DB1,DB3,DB4 CHANGE SOURCE
NOTE:
1.F2 : NOT RAYCHEM
S
B
:
1
.
R
E
P
L
A
C
E
F
5
w
i
t
h
t
y
p
e
o
f
F
1
(
o
k
)2
.
U
3
5
,
p
i
n
4
M
U
S
T
P
H
4
7
K
(
R
2
8
0
)
?
(
N
o
)3
.
P
U
T
R
5
3
7
B
A
C
K
?
(
n
o
)4
.
a
u
d
i
o
:
s
h
o
r
t
B
C
6
1
7
,
B
C
5
8
4
?
(
n
o
)5
.
a
u
d
i
o
:
r
e
m
o
v
e
B
C
5
8
3
,
R
1
3
9
,
R
1
3
8
,
B
C
1
3
5
(
n
o
)5
.
a
u
d
i
o
:
r
e
m
o
v
e
B
C
6
1
8
,
R
1
8
0
,
R
1
8
1
,
B
C
1
6
4
(
n
o
)7
.
a
u
d
i
o
:
m
o
d
i
f
y
B
C
5
8
4
a
n
d
B
C
6
1
7
t
o
3
3
n
F
(
n
o
)8
.
C
P
U
r
i
p
p
l
e
i
s
s
u
e
:
c
a
p
a
c
i
t
o
r
-
-
>
7
7
.
2
2
2
7
1
.
0
7
1
(
o
k
)9
.
B
C
8
,
B
C
2
1
-
-
>
D
U
M
M
Y1
0
.
E
M
I
:
L
5
,
L
8
,
L
1
1
,
L
1
4
,
L
1
5
,
L
3
3
,
L
4
0
,
L
4
1
,
L
4
2
,
L
4
3
(
6
8
.
0
0
0
8
2
.
3
2
1
)
-
-
>
0
8
0
5
0
O
h
m
E
M
I
:
L
1
(
6
8
.
0
0
0
8
9
.
0
8
1
)
-
-
>
d
e
l
e
t
e
E
M
I
:
L
3
0
(
6
3
.
R
0
0
0
3
.
1
6
1
)
-
-
>
0
8
0
5
0
O
h
m
E
M
I
:
L
3
1
(
6
8
.
4
R
7
2
B
.
1
F
1
)
-
-
>
0
8
0
5
0
O
h
m1
1
.
U
S
B
,
1
f
u
s
e
f
o
r
1
p
o
r
t
1
2
.
2
*
4
P
1
4
.
3
1
8
M
H
z1
3
D
B
1
01
4
M
I
C
C
4
21
5
B
L
31
6
W
O
L1
7
t
e
x
t
o
n
P
a
g
e
2
11
8
T
C
1
1
s
h
i
f
t
1
m
m1
9
C
L
K
3
3
_
P
C
M
SC
1.Board revision ID
2.USB controller change;replace USB port3 with port5
3.KBC-P60-->EN_MINI_PCI
4.VGA floating input-->PD "SSIN","SSOUT",HPD"
5.
TOUCAN2
1
REVISION HISTORY
A3
247Wednesday, December 18, 2002
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
VCC_CORE_S0
1D2V_VID_S0
1D25V_S0
1D8V_S0
2D5V_S3
2D5V_S0
VCC_RTC_S5
1D8V_S5
5V_S0
3D3V_S5
AD+
DCBATOUT
5V_S3
3D3V_S0
3D3V_S3
+5V_UP_S5
3D3V_LAN_S3
BT+
5V_AUDIO_S0
1D5V_S0
VCC_CORE_S05,6,7,10,23,25,36,39,40,41
1D2V_VID_S05,41
1D25V_S012,13,45
1D8V_S08,10,16,20,21,23,44,47
2D5V_S39,10,11,12,13,43,44,45
2D5V_S04,16,17,43,47
VCC_RTC_S521
1D8V_S510,22,23,45
DCBATOUT25,38,40,41,42,43,44,46
5V_S018,20,24,25,26,30,31,32,33,34,35,36,37,38,39,40,41,43,47
3D3V_S39,22,34,38,43,46,47
3D3V_S59,10,21,22,23,25,34,35,38,42,43,45,46,47
3D3V_S03,5,7,8,9,10,11,14,16,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,41,43,44,46,47
5V_S342,43,44
AD+42,46
+5V_UP_S538,42
3D3V_LAN_S321,26,27,31,43
5V_AUDIO_S032,33,47
BT+25,42
1D5V_S07,10,14,16,44,47
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
The frequency can be program by software
FS0FS1FS2FS3FS4
CPU DDRRAM ZCLK
AGPCLK PCI
FREQUENCY TABLE
000
0
1
0
00
0
1
0
0
1
0
0
001
66.67
66.67 66.67
66.6766.67
66.67
66.67
67.27 67.27
133.33
33.33
33.33
33.33
33.63
100.00
100.00
R1,R3,R9,R11
please as possible
closed to trace's
branch node.
Layout trace 10mil
Layout trace 25mil
ICS952004AG is TSOIC48 package
The part number is
71.952004.00W
CLOCK GROUP JITTER SKEW NOTE
HOST:CPUCLK0/#,CPUCLK1/#
HOST Bus To Memory Bus:
CPUCLK1/#,SDCLK
MuTIOL: ZCLK0, ZCLK1
AGP: ACLK0,ACLK1
PCI Bus:
PCICLK_F[0:1],PCICLK[0:5]
<0.25ns
<0.25ns
<0.25ns
<0.25ns
<0.5ns
<0.4ns
<0.4ns
<0.325ns
<0.325ns
<0.65ns
1,2
1. These skews are all calculated at the receiver's clock pin,
including clock driver pin to pin skew and PCB clock
routing skew.
2. All skews aare reference to the crossing point for
differential clock signals and 1.5V rising edge for 3.3V
clock signals.
Note:
100.90 100.90
133.33
100.00
100.00 66.67 66.67 33.33
1
01101
0
Default Setting
33MHz
66MHz
GTL CLK
133MHz
33MHz
14MHz
48MHz
Pull high 10kR with low
forward voltage diode
Prevent leakage in
S3 mode
66.67
SB
TOUCAN2
1
CLOCK GENERATOR
A3
347Wednesday, December 18, 2002
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CLK66_SIS650_1
CLK66_SIS962_1
CLK33_SIS962_FS3
CLK33_KBC_FS4
CLK14_SIS650_FS0
CLK14_SIS962_FS1
CLK14_SIO_FS2
MULTISEL
MULTISEL
CLK33_MINI_1
CLK33_SIS962_FS3
CLK33_KBC_FS4
CLK14_SIS650_FS0
CLK14_SIS962_FS1
CLK14_SIO_FS2
CLK33_LAN_1
CLK33_PCM_1
CLK33_LPCROM_1
CLK33_P80_1
CLK33_SIO_1
CLK33_MINI_1
ICS952004_IREF
CLK48_SIS962_USB_1
SMBD_SIS92_1
XTAL_CLK_X1
XTAL_CLK_X2
CLK48_SIS962_USB_1
CLK14_SIO_FS2
CLK33_KBC_FS4
CLK14_SIS650_FS0
CLK66_SIS962_1
CLK14_SIS962_FS1
CLK33_SIS962_FS3
CLK66_SIS650_1
CLK33_LAN_1
CLK133_DDR_1
SIS650_AGPCLK_1
CLK14_SIO
CLK14_SIS962
CLK66_SIS650
XTALIN_CODEC
CLK133_DDR
SIS650_AGPCLK
SMBD_SIS962
CLK48_SIS962_USB
SMBC_SIS962
CLK33_SIO_1
CLK33_P80_1
CLK33_LPCROM_1
SMBD_SIS92_1
SMBC_SIS92_1
CLK133_DDR_1
PM_CPUSTP#_1
PM_STP_PCI#_1
ATI_AGPCLK_1
SIS650_AGPCLK_1
ATI_AGPCLK_1
CLK33_SIS962
CLK33_LAN
CLK33_P80
CLK33_LPCROM
CLK33_KBC
CLK33_SIO
CLK66_SIS962
SMBC_SIS92_1
CLKH_SIS650#L1
CLKH_ITP
CLKCON
CLKH_SIS650#CLKH_SIS650#L1
CLKH_CPU#
CLKH_ITP#
CLKH_CPU
CLKH_SIS650
CLKCON#
CLKH_CPU#L1
CLKH_CPU#L1
CLKH_CPUL1
CLKH_CPUL1
CLKH_SIS650L1
CLKH_SIS650L1
PM_STP_PCI#_1
PM_CPUSTP#_1
XTAL_CLK_X1
XTAL_CLK_X2
CLK33_PCM_1
CLK33_MINI
3D3V_S0
3D3V_S0
3D3V_S0CLK_3D3V_S0
CLK_3D3V_S0
CLK_3D3V_S0
CLKGEN_VDDA
CLKGEN_VDDA3D3V_S0
3D3V_S0
R85 33R3
1 2
R379 0R3-0-U
1 2
C15 DUMMY-C3
1 2
C14 DUMMY-C3
1 2
C33 DUMMY-C3
1 2
C43 DUMMY-C3
1 2
C36 DUMMY-C3
1 2
C34 DUMMY-C3
1 2
C32 DUMMY-C3
1 2
C35 DUMMY-C3
1 2
R86 DUMMY-R3
1 2
RN13 SRN33
1
2
3
4 5
6
7
8
R381 22R3
1 2
R110 33R3
1 2
R380 33R3
1 2
R409 2K7R3
1 2
R410 2K7R3
1 2
R404
10KR3
12
R406 2K7R3
1 2
R376 10R3
1 2
R405 2K7R3
1 2
R407 2K7R3
1 2
R377 475R3F
1 2
RN12 RS8M33ROJ
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
C46 DUMMY-C3
1 2
C41 DUMMY-C3
1 2
C40 DUMMY-C3
1 2
C45 DUMMY-C3
1 2
C17 DUMMY-C3
1 2
C39 DUMMY-C3
1 2
C16 DUMMY-C3
1 2
BC477
SC4D7U25V-U
BC533
SCD1U16V3KX
BC479
SCD1U16V3KX
BC532
SCD1U16V3KX
BC483
SC1000P50V
BC478
SC1000P50V
BC534
SC1000P50V
BC535
SC1000P50V
BC484
SC4D7U10V6KX
12
L38
MLB-201209-11
1 2
R378 0R3-0-U
1 2
C44 DUMMY-C3
1 2
BC482
SCD1U16V3KX
BC481
SCD1U16V3KX
BC480
SCD01U50V3KX
L34
MLB-201209-11
1 2
R76 33R3
1 2
TP7 TPAD30
R54 49D9R3F
1 2
R81 DUMMY-33R3
1 2
R49 49D9R3F
1 2
R55 49D9R3F
1 2
R52 49D9R3F
1 2
R78 DUMMY-33R3
1 2
R50 DUMMY-49D9R3F
1 2
R53 DUMMY-49D9R3F
1 2
TP6 TPAD30
R51 DUMMY-49D9R3F
1 2
R56 DUMMY-49D9R3F
1 2
R83 33R3
1 2
R84 DUMMY-33R3
1 2
R82 33R3
1 2
U13
ICS952004AG
71.95204.00W
FS0/REF0
2
FS1/REF1
3
FS2/REF2
4
ZCLK0
9
ZCLK1
10
PCI_STOP#
12
FS3/PCICLK_F0
14
FS4/PCICLK_F1
15
PCICLK0
16
PCICLK1
17
PCICLK2
20
PCICLK3
21
PCICLK4
22
PCICLK5
23
SDRAM
47
CPU_STOP#
45
CPUCLKT_1
44
CPUCLKC_1
43
CPUCLKT_0
40
CPUCLKC_0
39
IREF
38
SCLK
35
SDATA
34
PD#/VTT_PWRGD
33
X1
6
X2
7
48MHZ
27
MULTISEL/24_48MHZ
26
AGPCLK1
30
AGPCLK0
31
GNDREF
5
GNDZ
8
GNDPCI
18
GNDPCI
24
GND48
25
GNDAGP
32
GNDA
37
GNDCPU
41
GNDSD
46
VDDA48
28
VDDA
36
VDDREF
1
VDDZ
11
VDDPCI
13
VDDPCI
19
VDDAGP
29
VDDCPU
42
VDDSD
48
R79 DUMMY-33R3
1 2
R80 33R3
1 2
R408
DUMMY-R3
1 2
RB22
1KR3
12
RB20
10KR3
1 2
DB7
DUMMY-RB751V-40
12
X8
X-14D318MHZ-1-U
12
R77
DUMMY-R3
1 2
R540 10R3
1 2
C37
DUMMY-C3
1 2
BC78
SC4P-manual
78.4R074.1F1
12
BC104
SC4P-manual
78.4R074.1F1
12
CLK133_DDR 9
SIS650_AGPCLK 7
CLK33_MINI 31
CLK48_SIS962_USB 22
SMBC_SIS962 4,11,21
SMBD_SIS962 4,11,21
CLK14_SIS962 21
CLK33_SIS962 20
CLK33_KBC 34
CLK14_SIO 37
CLK66_SIS650 8
CLK66_SIS962 20
VCORE_PWROK21,39
CLK33_SIO 37
CLK33_P80 36
CLK33_LPCROM 36
CLK33_PCM 29
ATI_AGPCLK 14
H_BSEL0 5,21
CLK33_LAN 27
XTALIN_CODEC 32
CLKH_CPU# 5
CLKH_ITP# 5
CLKH_ITP 5
CLKH_SIS650 7
CLKH_CPU 5
CLKH_SIS650# 7
PM_STP_PCI#21
PM_CPUSTP#21
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
The PLL trace need match the specific
L4 = L2+L3-L1+3.2"
L2 : SiS645 to Buffer length.(< 6" )
L3 : Buffer to DIMM socket length.(<4" )
L1 : 2 " ~ 4"(SIS645 to DDR-Socket)
L4 = need less 12.6"
Layout trace 10 mil
H2U
P/N:71.93732.00I
TOUCAN2
1
DDRCLK_BUFFER
A4
447Wednesday, December 18, 2002
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2D5V_VDDA_S0
2D5V_VDDA_S0
CLK133_DDRBUF
SMBC_SIS962
U2_DDR2
U2_DDR2#
U2_DDR3#
U2_DDR4#
U2_DDR4
U2_DDR5#
U2_DDR5
U2_DDR3
SMBD_SIS962
ICS93722_FBI
ICS93722_FBO
U2_DDR1
U2_DDR1#
U2_DDR0#
U2_DDR0
U2_DDR4
U2_DDR4#
U2_DDR2
U2_DDR5#
U2_DDR3
U2_DDR5
U2_DDR1#
U2_DDR1
U2_DDR0
U2_DDR2#
U2_DDR3#
U2_DDR0#
CLK_DDR3#
CLK_DDR4
CLK_DDR2
CLK_DDR5
CLK_DDR0
CLK_DDR3
CLK_DDR1
CLK_DDR5#
CLK_DDR1#
CLK_DDR2#
CLK_DDR4#
CLK_DDR0#
2D5V_S0
2D5V_S0
2D5V_S0
2D5V_S0
2D5V_S0
2D5V_VDDA_S0
BC570
SCD1U16V3KX
BC571
SCD1U16V3KX
BC128
SCD1U16V3KX
BC127
SCD1U16V3KX
BC126
SCD1U16V3KX
R403
22R3
1 2
R435
4K7R3
1 2
BC130
SC1000P50V
BC525
SC1000P50V
BC125
SC4D7U10V6KX
12
BC129
SC4D7U10V6KX
12
L15
MLB-201209-11
1 2
R215 0R2-0
1 2
R171 0R2-0
1 2
R172 0R2-0
1 2
R173 0R2-0
1 2
R132 0R2-0
1 2
R213 0R2-0
1 2
R133 0R2-0
1 2
R217 0R2-0
1 2
R212 0R2-0
1 2
R218 0R2-0
1 2
R216 0R2-0
1 2
R170 0R2-0
1 2
U23
CY28352OC
CLKC0
1
CLKT0
2
VDD
3
CLKT1
4
CLKC1
5
GND
6
SCLK
7
CKL_INT
8
N/C
9
VDDA
10
GND
11
VDD
12
CLKT2
13
CLKC2
14
GND
28
CLKC5
27
CLKT5
26
CLKC4
25
CLKT4
24
VDD
23
SDATA
22
N/C
21
FB_INT
20
FB_OUTT
19
N/C
18
CLKT3
17
CLKC3
16
GND
15
CLK133_DDRBUF9
SMBC_SIS9623,11,21 SMBD_SIS962 3,11,21
CLK_DDR1# 11
CLK_DDR0# 11
CLK_DDR4# 11
CLK_DDR1 11
CLK_DDR2# 11
CLK_DDR2 11
CLK_DDR4 11
CLK_DDR3 11
CLK_DDR3# 11
CLK_DDR5 11
CLK_DDR5# 11
CLK_DDR0 11
RSVD3
< 3" from CPU
L:RATED I = 60mA
C:ESR < 0.3 OHM, ESL < 5nH, +/- 20% TOLERANT
CPU Socket: P/N 62.10053.051
H2U Only Support Desktop
CPU
CPU Speed Setting Strap Pin
Desktop: 1KR3 pull to Vcore
Mobile: 200R3 pull to Vcore
SB
SB
TOUCAN2
1
NORTHWOOD (1/2)
A3
547Wednesday, December 18, 2002
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CC_FERR_S#
H_VCCS
H_BSEL0
H_VCCA2
CC_DPSLP#
H_VSSS
H_BSEL1
H_GTLREF_1
H_BYPASSEN#
PM_CPUPERF#
H_COMP0
DBRST#
H_VSSA
H_COMP1
H_IERR_PU#
H_BR1#
H_BR3#
H_BR2#
H_VID1
H_VID2
H_VID3
H_VID0
H_VID4
CC_INIT#
CC_INTR
CC_CPUSLP#
CC_STPCLK#
CC_SMI#
CC_DPSLP#
CC_NMI
PM_CPUPERF#
CC_A20M#
CC_IGNNE#
H_VCCA1
VCCSENSE_S0
HVCCA2
SIS650_AF3
Q3_B
GTL_A#16
GTL_A#15
GTL_A#14
GTL_A#13
GTL_A#12
GTL_A#11
GTL_A#10
GTL_A#9
GTL_A#8
GTL_A#7
GTL_A#6
GTL_A#5
GTL_A#4
GTL_A#3
GTL_REQ#4
GTL_REQ#3
GTL_REQ#2
GTL_REQ#1
GTL_REQ#0
GTL_A#31
GTL_A#30
GTL_A#29
GTL_A#28
GTL_A#27
GTL_A#26
GTL_A#25
GTL_A#24
GTL_A#23
GTL_A#22
GTL_A#21
GTL_A#20
GTL_A#19
GTL_A#18
GTL_A#17
H_AP#0
H_AP#1
H_BINIT#
H_DP#2
H_DP#3
H_MCERR#
H_RSP#
CC_PROCHOT_S#
Q3_C
H_BSEL0
H_BSEL1
H_GTLREF_3
H_MCLK0
H_MCLK2
H_MCLK3
H_ODT
H_MCLK1
H_MCLKIO0
H_BYPASSEN#
H_MCLKIO1
H_MCLK0
H_MCLK2
H_MCLK3
H_MCLKIO0
H_MCLKIO1
H_MCLK1
H_ODT
CC_THRMTRIP#_P
GTL_D#17
GTL_D#19
GTL_D#26
GTL_D#32
GTL_D#37
GTL_D#38
GTL_D#41
GTL_D#45
GTL_D#56
GTL_D#59
GTL_D#62
GTL_D#11
GTL_D#14
GTL_D#5
GTL_D#18
GTL_D#27
GTL_D#35
GTL_D#36
GTL_D#44
GTL_D#47
GTL_D#57
GTL_D#10
GTL_D#13
GTL_D#4
GTL_D#39
GTL_D#46
GTL_D#9
GTL_D#15
GTL_D#3
GTL_D#2
GTL_D#1
GTL_D#8
GTL_D#24
GTL_D#30
GTL_D#49
GTL_D#51
GTL_D#0
GTL_D#7
GTL_D#20
GTL_D#29
GTL_D#50
GTL_D#55
GTL_D#6
GTL_D#23
GTL_D#28
GTL_D#31
GTL_D#33
GTL_D#42
GTL_D#48
GTL_D#53
GTL_D#54
GTL_D#61
GTL_D#16
GTL_D#21
GTL_D#22
GTL_D#25
GTL_D#34
GTL_D#40
GTL_D#43
GTL_D#52
GTL_D#58
GTL_D#60
GTL_D#63
GTL_D#12
H_DP#0
H_DP#1
VCC_CORE_S0
VCC_CORE_S0
VCC_CORE_S0
VCC_CORE_S0
1D2V_VID_S0
VCC_CORE_S0
VCC_CORE_S0
3D3V_S0
VCC_CORE_S0
VCC_CORE_S0
1D2V_VID_S0
VCC_CORE_S0
1D2V_VID_S0
1D2V_VID_S0
3D3V_S0
VCC_CORE_S0
R370
100R3F
12
R439
200R3
12
R330
200R3
12
R440
200R3
12
R384
200R3
12
R418
200R3
12
R417
200R3
12
R412
200R3
12
R383
200R3
12
R328
300R3
12
R325
470R3
1 2
R438 51D1R3F
1 2
R327 51D1R3F
1 2
L32
IND-4D7UH
68.4R72B.1F1
1 2
TC5
ST33U10VCM-U
12
TC4
ST33U10VCM-U
77.23361.001
1 2
BC491
SC1U10V3ZY
BC419
SC1U10V3ZY
R326
56R3
12
R324
470R3
12
Q29
UMX1N
1
2
34
5
6
R332
0R3-0-U
1 2
R333
0R3-0-U
1 2
R302
0R3-0-U
1 2
RN92
SRN56
1
2
3
4 5
6
7
8
R329 51R3F
1 2
R441 10KR3
1 2
R369
100R3F
12
U9C
CPU-SOCKET-479-NB
62.10053.051
BCLK0
AF22
BCLK1
AF23
ITP_CLK0
AC26
ITP_CLK1
AD26
LINT0
D1
LINT1
E5
VID0
AE5
VID1
AE4
VID2
AE3
VID3
AE2
VID4
AE1
NC
A22
NC
A7
NC
AD2
NC
AD3
NC
AE21
NC
AF24
NC
AF25
BSEL0
AD6
BSEL1
AD5
COMP0
L24
COMP1
P1
BPM#0
AC6
BPM#1
AB5
BPM#2
AC4
BPM#3
Y6
BPM#4
AA5
GTLREF
AA21
GTLREF
AA6
GTLREF
F20
GTLREF
F6
TESTHI0
AD24
TESTHI1
AA2
TESTHI2
AC21
TESTHI3
AC20
TESTHI4
AC24
TESTHI5
AC23
TESTHI6
AA20
A20M#
C6
FERR#
B6
IGNNE#
B2
SMI#
B5
STPCLK#
Y4
VCCA
AD20
VCCSENSE
A5
VCCIOFLL
AE23
VSSA
AD22
VSSSENSE
A4
VCCVID
AF4
THERMDA
B3
THERMTRIP#
A2
TESTHI7
AB22
DBR#
AE25
DPSLP#
AD25
PROCHOT#
C3
PWRGOOD
AB23
SLP#
AB26
TCK
D4
TDI
C1
TDO
D5
TMS
F7
TRST#
E6
BPM#5
AB4
VCCVID
AF3
THERMDC
C4
TESTHI11
A6
RN77
RS8M56ROJ
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
R390
0R3-0-U
1 2
R443 1KR3
1 2
R371
49D9R3F
12
R368
49D9R3F
12
R385
56R3
12
RN93
SRN1K
1
2
3
4 5
6
7
8
R303
0R5
12
R495 DUMMY-R2
1 2
R382 DUMMY-R2
ZZ.DUMMY.X02
1 2
R392
DUMMY-R5
ZZ.DUMMY.XR5
12
R331
1KR3
12
U9B
CPU-SOCKET-479-NB
62.10053.051
D#0
B21
D#1
B22
D#2
A23
D#3
A25
D#4
C21
D#5
D22
D#6
B24
D#7
C23
D#8
C24
D#9
B25
D#10
G22
D#11
H21
D#12
C26
D#13
D23
D#14
J21
D#15
D25
D#16
H22
D#17
E24
D#18
G23
D#19
F23
D#20
F24
D#21
E25
D#22
F26
D#23
D26
D#24
L21
D#25
G26
D#26
H24
D#27
M21
D#28
L22
D#29
J24
D#30
K23
D#31
H25
D#32
M23
D#33
N22
D#34
P21
D#35
M24
D#36
N23
D#37
M26
D#38
N26
D#39
N25
D#40
R21
D#41
P24
D#42
R25
D#43
R24
D#44
T26
D#45
T25
D#46
T22
D#47
T23
D#48
U26
D#49
U24
D#50
U23
D#51
V25
D#52
U21
D#53
V22
D#54
V24
D#55
W26
D#56
Y26
D#57
W25
D#58
Y23
D#59
Y24
D#60
Y21
D#61
AA25
D#62
AA22
D#63
AA24
DINV#0
E21
DINV#1
G25
DINV#2
P26
DINV#3
V21
STBN#0
E22
STBN#1
K22
STBN#2
R22
STBN#3
W22
STBP#0
F21
STBP#1
J23
STBP#2
P23
STBP#3
W23
R367
1KR3
12
R388
DUMMY-R3
12
R391
DUMMY-R3
12
R389
DUMMY-R3
12
TP41
TPAD30
TP42
TPAD30
TP48
TPAD30
TP53 TPAD30
TP45 TPAD30
TP46 TPAD30
TP34 TPAD30
TP33 TPAD30
TP44
TPAD30
TP47
TPAD30
TP52
TPAD30
R386
51R2
63.51034.1D1
1 2
R387
220R3F
1 2
R442
DUMMY-R3
12
TP35 TPAD30
U9D
CPU-SOCKET-479-NB
62.10053.051
A#3
K2
A#4
K4
A#5
L6
A#6
K1
A#7
L3
A#8
M6
A#9
L2
A#10
M3
A#11
M4
A#12
N1
A#13
M1
A#14
N2
A#15
N4
A#16
N5
A#17
T1
A#18
R2
A#19
P3
A#20
P4
A#21
R3
A#22
T2
A#23
U1
A#24
P6
A#25
U3
A#26
T4
A#27
V2
A#28
R6
A#29
W1
A#30
T5
A#31
U4
A#32
V3
A#33
W2
A#34
Y1
A#35
AB1
REQ#0
J1
REQ#1
K5
REQ#2
J4
REQ#3
J3
REQ#4
H3
AP#0
AC1
AP#1
V5
DP#0
J26
DP#1
K25
DP#2
K26
DP#3
L25
TESTHI8
U6
TESTHI9
W4
TESTHI10
Y3
RS#0
F1
RS#1
G5
RS#2
F4
ADSTB#0
L5
ADSTB#1
R5
ADS#
G1
BINIT#
AA3
BNR#
G2
BPRI#
D2
DEFER#
E2
DBSY#
H5
BR#0
H6
IERR#
AC3
INIT#
W5
LOCK#
G4
MCERR#
V6
RESET#
AB25
TRDY#
J6
HIT#
F3
HITM#
E3
DRDY#
H2
RSP#
AB2
TP32 TPAD30
BC365
SCD1U
BC486
SCD1U
BC426
SCD1U
BC374
SCD1U
H_BPM5_PREQ# 6
H_TMS 6
CC_STPCLK#21
H_TRST# 6
CC_NMI21
CC_IGNNE#21
H_TCK 6
H_BPM0_ITP# 6
H_BPM1_ITP# 6
H_TDI 6
CC_SMI#21,47
CC_INTR21
CC_A20M#21
CLKH_CPU#3
H_TDO 6
THERMDP125
H_BPM4_PRDY# 6
THERMDN25
CLKH_ITP#3
CLKH_ITP3
CLKH_CPU3
GTL_D#[15..0]7
GTL_D#[63..48] 7
GTL_D#[47..32] 7
GTL_ADSTB#07
GTL_BNR# 7
GTL_REQ#[4..0]7
GTL_A#[16..3]7
CC_INIT# 21,36
GTL_ADSTB#17
GTL_RS#1 7
GTL_CPURST# 7
GTL_HIT# 7
GTL_TRDY# 7
GTL_BPRI# 7
GTL_DRDY# 7
GTL_ADS# 7
GTL_A#[31..17]7
GTL_BR0# 7
GTL_RS#2 7
GTL_LOCK# 7
GTL_HITM# 7
GTL_RS#0 7
GTL_DEFER# 7
GTL_DBSY# 7
GTL_D#[31..16]7
H_VID039
H_VID239
H_VID339
H_VID139
H_VID439
CC_CPUPWROK 7
CC_PROCHOT_S# 25
CC_CPUSLP# 21
ITP_RST# 6
CC_FERR#21
CC_THRMTRIP_S#25
GTL_DINV#07
GTL_DSTBP#2 7
GTL_DINV#2 7
GTL_DSTBP#3 7GTL_DSTBP#17
GTL_DSTBN#07 GTL_DSTBN#2 7
GTL_DINV#17
GTL_DSTBP#07
GTL_DSTBN#17
GTL_DINV#3 7
GTL_DSTBN#3 7
H_BSEL0 3,21
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