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Acer Aspire 5550 3670 (Wistron Garda-3 AG3 Discrete).pdf
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Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
AG3 2
BLOCK DIAGRAM
A3
1 55Thursday, April 20, 2006
BOM
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
AG3 2
BLOCK DIAGRAM
A3
1 55Thursday, April 20, 2006
BOM
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
AG3 2
BLOCK DIAGRAM
A3
1 55Thursday, April 20, 2006
BOM
DMI I/F
HOST BUS
DDR2
ICH7M
PCI BUS
Calistoga
CLK GEN.
400/533/667MHz
100MHz
KBC
533 MHz
3
4, 5
6,7,8,9,10
11,12
15,16,17,18
32
MDC Card
G1432Q
OP AMP
30
AZALIA
21
MODEM
ALC883
Garda-3 Block Diagram
Garda-3 Block DiagramGarda-3 Block Diagram
Garda-3 Block Diagram
INPUTS
SYSTEM
TPS51120
5V_S5
40
OUTPUTS
DCBATOUT
G791/G792
19
3D3V_S5
1D8V_S3
43
1D05V_S0
INPUTS OUTPUTS
Mobile CPU
Yonah 478
Project code: 91.4P401.001
PCB P/N : 55.4P401.XXX
REVISION : 06208-2
(Hannstar, GCE)
533/667MHz
30
DDR_VREF_S0
Line Out
(SPDIF)
RE144B
CARDBUS
RICOH
1394
CONN
27,28
28
28
CardReader
1394
30
Line In
MIC In
30
6 in 1
DDR2
533 MHz
11,12
533/667MHz
LPC BUS
29
Mini Card*1
TOP
VCC
S
S
GND
BOTTOM
PCB STACKUP
APL5332KAC
3D3V_S0 2D5V_S0
APL5912
1D8V_S3 1D5V_S0
43
43
42
38,39
VCC_CORE_S0
0~1.3V
44A
OUTPUTS
CPU
INPUTS
DCBATOUT
MAXIM CHARGER
OUTPUTSINPUTS
CHG_PWR
DCBATOUT
UP+5V
5V 100mA
18V 4.0A
ISL6255
ISL6262
IDT CV125PA
(ICS 954206)
INT.SPKR
Codec
MS/MS Pro/xD/
MMC/SD/SDIO
30
22
LAN
GIGA or 10/100
RTL8110 or RTL8100CL
31
Mini-PCI
802.11A/B/G
23
TXFM
RJ45
RJ11
INT.
KB
Touch
Pad
33 33
FIR
34
34
25
25
TPS2211
PCMCIA
SLOT
Support
TypeII
PCMCIA I/F
PWR SW
31
31
New card
PCI Express
PWR SW
TPS2231
R5C832
ATI M52 DC/DC
INPUTS
VGA_CORE_S0
ISL6269
OUTPUTS
DCBATOUT
52
APL5331
43
1D8V_S0 1D2V_S0
TVO
VRAM x4
RGB CRT
LVDS
CRT
45,46,47,48,49
13
14
ATI
M54P / M52P
14"WSXGA+
LCD
PCI Express x16
50,51
PATA
USB
3 PORT
HDD
MINI USB
Blue-tooth
21
20
CDROM
128/256M
20
21
23
26
14
(Discrete)
SPI I/F
PCIEx1
35
BIOS
SIO
NS87381
INT.MIC
Ver. : B0, 71.ICH7M.A0U / QK65
Ver.:A2 :71.945PM.00U / QK46
M56 Ver.: B24
M52 Ver.: A12
M54 Ver.: A12
SST25LF080A
DATE:2006/0?/??
Renesas
802.11A/B/G
SATA
APL5912
SYSTEM DC/DC
DEBUG
CONN.
LPC
35
ENE CB1410
24,25
G792SFUF
FAN CONN
Thermal
19
TPS51116
DCBATOUT
1D8V_S3
41
OP AMP
MAX4411
30
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
AG3 2
Reference
A3
2 55Thursday, April 20, 2006
BOM
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
AG3 2
Reference
A3
2 55Thursday, April 20, 2006
BOM
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
AG3 2
Reference
A3
2 55Thursday, April 20, 2006
BOM
Calistoga Strapping Signals and
Configuration
954305D 27Mhz/LCDCLK Spread
and Frequency Selection Table
SS3
Byte9
bit 7
SS2
bit6
SS1
bit5
SS0
bit4
Spread Amount%
0 0 0
0 0
0
0
0
0
1
1 1
0
1
-0.50 Down
-1.00 Down
-1.50 Down
-2.00 Down
-0.75 Down
-1.25 Down
-1.75 Down
-2.25 Down
page 7
page 3
ICH7 internal 20K pull-ups
approximately 33 ohm
DD[15:0],
DDACK#,
ICH7 internal 20K pull-downs
IORDY,
LAN_RXD[2:0]
ICH7M Integrated Pull-up
and Pull-down Resistors
DCS3#,
DCS1#,
DIOR#, DREQ,DIOW#,
ICH7-M EDS 17837 1.5V1
DA[2:0],
ACZ_BIT_CLK, ACZ_RST#, ACZ_SDIN[2:0],
ACZ_SYNC,ACZ_SDOUT,
USB[7:0][P,N]
ICH7 internal 11.5K pull-downs
LAN_CLK
DD[7],
ICH7 internal 100K pull-down
ICH7M IDE Integrated Series
Termination Resistors
DDREQ
ICH7 internal 15K pull-downs
DPRSLPVR/GPIO16,
EE_DIN, EE_DOUT,
EE_CS,
GNT[5]#/GPO17,
GPIO[25],
LAD[3:0]#/FHW[3:0]#,
LDRQ[0], LDRQ[1]/GPIO[41],
PME#,
PWRBTN#,
SPKR,
TP[3]
IDEIRQ
0 0
0
0
1
1
1
1 1
1 1
+-0.5 Center
+-0.75 Center
+-1.0 Center
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1 +-0.25 Center
+-0.5 Center
+-0.75 Center
+-1.0 Center
+-0.25 Center
MiniPCI
INT -> PIRQ
22
23
0
2
A/C -> E
PCI Routing
1410
LAN
1
A -> H
REQ/GNTIDSEL
21
CFG[2:0]
CFG[4:3]
CFG5
CFG8
Pin Name
001 = FSB533
011 = FSB667
FSB Frequency Select
0 = DMI x2
others = Reserved
Reserved
(Default)
1 = DMI x4
Strap Description
DMI x2 Select
Reserved
Configuration
ReservedCFG6
CFG7
0 = Reserved
1 =Mobile CPU(Default)
CPU Strap
CFG9
0 = 1.05V
00 = Reserved
(Default)
(Default)
edge of the Calistoga GMCH PWORK in signal.
CFG16
10 = All Z mode enabled
0 = No SDVO Card present
_DATA
CFG[15:14]
SDVO Present
(Default)
CFG19
CFG20
straps
VCC Select
CFG17
CFG18
11 = Normal Operation
1 = Dynamic ODT Enabled
All strap signals are sampled with respect to the leading
0 = Dynamic ODT Disabled
1= SDVO Card present
SDVOCRTL
SDVO/PCIE
Concurrent
XOR/ALL Z test
1 = 1.5V
FSB Dynamic ODT
Global R-comp Disable
(All R-comps)
Reserved
01 = XOR mode enabled
DMI Lane Reversal
NOTE:
(Default)
PCI Express Graphics
Lane Reversal
0 = Reverse Lanes,15->0,14->1 ect..
1= Normal operation(Default):Lane
Numbered in order
CFG[11:10] Reserved
CFG[13:12]
Reserved
0 = Normal operation (Default):lane
Numbered in order
0 = All R-comp Disable
1 = Normal Operation (Default)
1 =Reverse Lane,4->0,3->1 ect...
0 = Only SDVO or PCIE x1 is
operational (Default)
1 =SDVO and PCIE x1 are operating
simultaneously via the PEG port
History
A->G
EDS 17050 0.71
SPI_ARB, SPI_CLK,
GNT[3:0],
GNT[4]#/GPIO48,
ICH7 internal 15K pull-upSATALED#
page 16
Reserved
EE_DOUT
GNT2#
Sets bit0 of RPC.PC(Config Registers:Offset 224h)
Top-Block
Swap Override.
Rising Edge of PWROK.
GNT5#/
GPIO17#,
GNT4#/
GPIO48
Boot BIOS Destination
Selection.
Rising Edge of PWROK.
Controllable via Boot BIOS Destination bit
(Config Registers:Offset 3410h:bit 11:10).
GNT5# is MSB, 01-SPI, 10-PCI, 11-LPC.
DPRSLPVR Reserved
ACZ_SDOUT
ACZ_SYNC
EE_CS
GNT3#
Signal
Sampled low:Top-Block Swap mode(inverts A16 for
all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.
This signal should not be pull high.
XOR Chain Entrance/
PCIE Port Config bit1,
Rising Edge of PWROK
TBD, Chapter 8.
Allows entrance to XOR Chain testing when TP3
pulled low.When TP3 not pulled low at rising edge
of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h)
PCIE bit0,
Rising Edge of PWROK.
GPIO25
Usage/When Sampled
Requires an external pull-up resistor.
Reserved.
Rising Edge of RSMRST#.
Comment
ICH7M Functional Strap Definitions
Reserved
This signal should not be pull low.
Reserved
This signal should not be pull low.
This signal should not be pull high.
INTVRMEN
LINKALERT#
REQ[4:1]#
SATALED#
SPKR
TP3
This signal should not be pull low.
Integrated VccSus1_05
VRM Enable/Disable.
Always sampled.
Enables integrated VccSus1_05 VRM when
sampled high
Reserved
XOR Chain Selection.
Rising Edge of PWROK.
Reserved This signal should not be pull low.
No Reboot.
Rising Edge of PWROK.
XOR Chain Entrance.
Rising Edge of PWROK.
This signal should not be pull low unless using
XOR Chain testing.
If sampled high, the system is strapped to the
"No Reboot" mode(ICH7 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.
page 16
B/D -> E
1394 17 A->B, B->F, 3
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
3D3V_CLKGEN_S0
PCLK_KBC
CLK48_ICH
CLK_ICHPCI
PCLK_PCM
CLK_ICH14
CLK_MCH_BCLK
CLK_CPU_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_PEG
CLK_PCIE_PEG#
PCLK_MINI
PCLK_SIO
3D3V_48MPWR_S0
GEN_XTAL_OUT
GEN_XTAL_IN
GEN_XTAL_OUT_R
3D3V_CLKPLL_S0
GEN_REF
SS_SEL
PCLKCLK3
SS_SEL
PCLKCLK2
PCLKCLK1
GEN_REF
GEN_IREF
ITP_EN
PCLKCLK2
DREFCLK_1
DREFCLK#_1
DREFSSCLK#
DREFSSCLK
DREFCLK#
DREFCLK
PCLKCLK0
CPU_SEL2
CPU_SEL1
DREFSSCLK#_1
DREFSSCLK_1
CLK_CPU_BCLK_1
CLK48
CLK_PCIE_MINI2_2#CLK_PCIE_MINI2_2#CLK_PCIE_MINI2_2#
CLK_PCIE_MINI2_1CLK_PCIE_MINI2_1CLK_PCIE_MINI2_1
CLK_PCIE_NEW_1#
CLK_CPU_BCLK_1#
CLK_PCIE_NEW_1
CLK_PCIE_ICH_1#
CLK_PCIE_ICH_1
CLK_MCH_BCLK_1
CLK_MCH_BCLK_1#
CLK_PCIE_MINI1_1
CLK_PCIE_MINI1_1#
CLK_PCIE_PEG_1
CLK_PCIE_PEG_1#
CLK_MCH_3GPLL_1#
CLK_MCH_3GPLL_1
CLK_PCIE_SATA_1
CLK_PCIE_SATA_1#
3D3V_CLKPLL_S0
3D3V_48MPWR_S0
3D3V_CLKGEN_S0
CLK_PCIE_NEW
CLK_PCIE_NEW#
CLK_PCIE_MINI1
CLK_PCIE_MINI2
CLK_PCIE_MINI2#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_PCIE_MINI1#
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
CLK_ICH1416
PM_STPPCI#16
PCLK_KBC32
PCLK_SIO34
CLK_ICHPCI16
PCLK_PCM24
SMBD_ICH11,18
SMBC_ICH11,18
CLK14_SIO34
CLK_EN#38
PCLK_FWH35
DREFCLK7
DREFCLK#7
PCLK_R5C83227
DREFSSCLK# 7
DREFSSCLK 7
CLK_PCIE_SATA 15
CLK_PCIE_SATA# 15
CLK_PCIE_PEG 45
CLK_PCIE_PEG# 45
CLK48_ICH 16
CLK_PCIE_MINI1 26
CLK_PCIE_MINI1# 26
CPU_SEL1 4,7
CPU_SEL0 4,7
CPU_SEL2 4,7
CLK_PCIE_ICH 16
CLK_PCIE_ICH# 16
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
CLK_PCIE_MINI2 55
CLK_PCIE_MINI2# 55
CLK_PCIE_NEW 31
CLK_PCIE_NEW# 31
PM_STPCPU# 16
PCLK_LAN22
PCLK_MINI31
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Clock Generator ICS954305D
A3
3 55Friday, April 21, 2006
AG3 2
BOM
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Clock Generator ICS954305D
A3
3 55Friday, April 21, 2006
AG3 2
BOM
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Clock Generator ICS954305D
A3
3 55Friday, April 21, 2006
AG3 2
BOM
EMI capacitor
H/L: 100/96MHz
H/L : CPU_ITP/SRC7
PCLK_FWH & PCLK_PCM
need equal length
Dummy when use UMA
SC
SA
SA
1 2
EC47 Do Not Stuff
DY
EC47 Do Not Stuff
DY
1
2 3
4
RN52
SRN49D9F-GP
RN52
SRN49D9F-GP
1
2 3
4
RN56 Do Not Stuff
ATI
RN56 Do Not Stuff
ATI
12
R530
0R3-0-U-GP
R530
0R3-0-U-GP
1
2 3
4
RN65 Do Not Stuff
SATA
RN65 Do Not Stuff
SATA
1
2 3
4
RN62 SRN33J-5-GP-U
MINIC
RN62 SRN33J-5-GP-U
MINIC
12
C320
SC4D7U10V5ZY-3GP
C320
SC4D7U10V5ZY-3GP
12
R524
Do Not Stuff
DY
R524
Do Not Stuff
DY
1 2
R523
10KR2J-3-GP
R523
10KR2J-3-GP
1 2
C322
SC33P50V2JN-3GP
C322
SC33P50V2JN-3GP
1 2
EC23 Do Not Stuff
DY
EC23 Do Not Stuff
DY
12
C647
SC1U6D3V2ZY-GP
C647
SC1U6D3V2ZY-GP
1 2
C323
SC27P50V2JN-2-GP
C323
SC27P50V2JN-2-GP
1 2
EC26 SC10P50V2JN-4GPEC26 SC10P50V2JN-4GP
1
2 3
4
RN50
SRN33J-5-GP-U
GM
RN50
SRN33J-5-GP-U
GM
12
X3
X-14D31818M-31GP
82.30005.831
X3
X-14D31818M-31GP
82.30005.831
12
C319
SCD1U16V2ZY-2GP
C319
SCD1U16V2ZY-2GP
1
2 3
4
RN60
SRN49D9F-GP
RN60
SRN49D9F-GP
VDD_PCI
1
VSS_PCI
2
PCI1
3
PCI2
4
PCI3
5
VSS_PCI
6
VDD_PCI
7
PCIF0/ITP_EN
8
PCIF1/SEL100/96#
9
VTT_PWRGD#/PD
10
VDD48
11
USB48/FSA
12
VSS48
13
DOT96
14
DOT96#
15
FSB/TEST_MODE
16
LVDS
17
LVDS#
18
SRC1
19
SRC1#
20
VDD_SRC
21
SRC2
22
SRC2#
23
SRC3
24
SRC3#
25
SRC4
26
SRC4#
27
VDD_SRC
28
VSS_SRC
29
SRC5#
30
SRC5
31
SRC6#
32
SRC6
33
VDD_SRC
34
CPU2_ITP#/SRC7#
35
CPU2_ITP/SRC7
36
VDDA
37
VSSA
38
IREF
39
CPU1#
40
CPU1
41
VDD_CPU
42
CPU0#
43
CPU0
44
VSS_CPU
45
SCL
46
SDA
47
VDD_REF
48
XTAL_OUT
49
XTAL_IN
50
VSS_REF
51
REF
52
FSC/TEST_SEL
53
CPU_STOP#
54
PCI_STOP#
55
PCI0
56
U34
IDTCV125PAG-GP 71.00125.A0W
U34
IDTCV125PAG-GP 71.00125.A0W
12
R526
Do Not Stuff
DY
R526
Do Not Stuff
DY
1
2 3
4
RN51 SRN33J-5-GP-URN51 SRN33J-5-GP-U
12
C650
SC1U6D3V2ZY-GP
C650
SC1U6D3V2ZY-GP
1 2
R233 33R2J-2-GPR233 33R2J-2-GP
1 2
R224 470R2J-2-GPR224 470R2J-2-GP
1
2 3
4
RN54 SRN33J-5-GP-U
GM
RN54 SRN33J-5-GP-U
GM
1 2
R525 33R2J-2-GPR525 33R2J-2-GP
1
2 3
4
RN61 SRN33J-5-GP-URN61 SRN33J-5-GP-U
1 2
EC22 SC10P50V2JN-4GPEC22 SC10P50V2JN-4GP
1
2 3
4
RN63
SRN49D9F-GP
MINIC
RN63
SRN49D9F-GP
MINIC
12
C325
SCD1U16V2ZY-2GP
C325
SCD1U16V2ZY-2GP
1
2 3
4
RN57
Do Not Stuff
ATI
RN57
Do Not Stuff
ATI
1 2
R232 22R2J-2-GPR232 22R2J-2-GP
1 2
R235 22R2J-2-GPR235 22R2J-2-GP
12
R529
475R2F-L1-GP
R529
475R2F-L1-GP
1 2
R228 33R2J-2-GPR228 33R2J-2-GP
12
C655
SCD1U16V2ZY-2GP
C655
SCD1U16V2ZY-2GP
1 2
EC24 SC10P50V2JN-4GPEC24 SC10P50V2JN-4GP
1
2 3
4
RN47 SRN33J-5-GP-URN47 SRN33J-5-GP-U
12
C645
SCD1U16V2ZY-2GP
C645
SCD1U16V2ZY-2GP
1
2 3
4
RN106
Do Not Stuff
MINIC2
RN106
Do Not Stuff
MINIC2
1 2
R223 33R2J-2-GPR223 33R2J-2-GP
1 2
EC48 Do Not Stuff
DY
EC48 Do Not Stuff
DY
1 2
R236 2K2R2J-2-GPR236 2K2R2J-2-GP
1
2 3
4
RN66 Do Not Stuff
NEW
RN66 Do Not Stuff
NEW
12
R229 22R2J-2-GPR229 22R2J-2-GP
1
2 3
4
RN67
Do Not Stuff
NEW
RN67
Do Not Stuff
NEW
1 2
EC25 SC10P50V2JN-4GPEC25 SC10P50V2JN-4GP
12
R222
0R3-0-U-GP
R222
0R3-0-U-GP
1 2
R227 33R2J-2-GPR227 33R2J-2-GP
1
2 3
4
RN48
SRN49D9F-GP
RN48
SRN49D9F-GP
1
2 3
4
RN58 SRN49D9F-GPRN58 SRN49D9F-GP
1
2 3
4
RN53
SRN49D9F-GP
RN53
SRN49D9F-GP
1
2 3
4
RN64
Do Not Stuff
SATA
RN64
Do Not Stuff
SATA
12
C321
Do Not Stuff
DY
C321
Do Not Stuff
DY
1 2
R231 33R2J-2-GPR231 33R2J-2-GP
1
2 3
4
RN59 SRN33J-5-GP-URN59 SRN33J-5-GP-U
12
R532
0R3-0-U-GP
R532
0R3-0-U-GP
1 2
R230
22R2J-2-GP
R230
22R2J-2-GP
1
2 3
4
RN107
Do Not Stuff
MINIC2
RN107
Do Not Stuff
MINIC2
12
C653
SCD1U16V2ZY-2GP
C653
SCD1U16V2ZY-2GP
12
C651
SCD1U16V2ZY-2GP
C651
SCD1U16V2ZY-2GP
12
C648
SCD1U16V2ZY-2GP
C648
SCD1U16V2ZY-2GP
12
R522
10KR2J-3-GP
R522
10KR2J-3-GP
1
2 3
4
RN49
SRN49D9F-GP
RN49
SRN49D9F-GP
12
R225 22R2J-2-GPR225 22R2J-2-GP
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
H_A#18
H_A#20
H_A#21
H_A#22
H_A#17
H_A#19
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#1
H_RS#0
H_RS#2
H_IERR#
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_TCK
XDP_TDI
XDP_TMS
XDP_TRST#
XDP_TDO
XDP_DBRESET#
XDP_BPM#5
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#41
H_D#40
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#48
H_D#49
H_D#51
H_D#50
H_D#52
H_D#53
H_D#54
H_D#55
H_D#57
H_D#56
H_D#58
H_D#59
H_D#60
H_D#61
H_D#63
H_D#62
COMP0
COMP1
COMP2
COMP3TEST1
TEST2
XDP_TDI
XDP_TMS
XDP_TRST#
XDP_TDO
H_CPURST#
XDP_DBRESET#
XDP_TCK
H_THERMDC
H_THERMDA
CPU_GTLREF0
1D05V_S0
1D05V_S0
1D05V_S0
1D05V_S0
3D3V_S0
H_ADS# 6
H_BNR# 6
H_DRDY# 6
H_DBSY# 6
H_BREQ#0 6
H_HIT# 6
H_HITM# 6
H_LOCK# 6
H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6
H_D#[63..0] 6
H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
H_ADSTB#16
H_A#[31..3]6
H_ADSTB#06
H_REQ#[4..0]6
H_DSTBN#06
H_DSTBP#06
H_DINV#06
H_DSTBN#16
H_DSTBP#16
H_DINV#16
H_BPRI# 6
H_DEFER# 6
H_INIT# 15
H_CPURST# 6
H_RS#[2..0] 6
H_TRDY# 6
H_THERMDA 19
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
H_DPRSLP# 15,38
H_DPSLP# 15
H_DPW R# 6
H_PWRGD 15,36
H_CPUSLP# 6,15
H_FERR#15
H_THERMDC 19
PM_THRMTRIP-I# 36
H_INTR15
H_NMI15
H_SMI#15
H_IGNNE#15
H_A20M#15
H_DINV#[3..0] 6
H_DSTBN#[3..0] 6
H_DSTBP#[3..0] 6
CPU_SEL23,7
CPU_SEL03,7
CPU_SEL13,7
H_STPCLK#15
PSI# 38
CPU_PROCHOT# 38
PM_THRMTRIP-A# 7
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
A3
4 55Thursday, April 20, 2006
AG3 2
BOM
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
A3
4 55Thursday, April 20, 2006
AG3 2
BOM
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
A3
4 55Thursday, April 20, 2006
AG3 2
BOM
H_IERR# with a GND
0.1" away
Place testpoint on
Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .
trace length shorter than 0.5" .
Layout Note:
0.5" max length.
( No stub)
should connect to
PM_THRMTRIP#
without T-ing
ICH7 and Calistoga
All place within 2" to CPU
2nd source: 62.10053.401
COMP[0]
R26
COMP[1]
U26
COMP[2]
U1
COMP[3]
V1
D[0]#
E22
D[1]#
F24
D[10]#
J24
D[11]#
J23
D[12]#
H26
D[13]#
F26
D[14]#
K22
D[15]#
H25
D[16]#
N22
D[17]#
K25
D[18]#
P26
D[19]#
R23
D[2]#
E26
D[20]#
L25
D[21]#
L22
D[22]#
L23
D[23]#
M23
D[24]#
P25
D[25]#
P22
D[26]#
P23
D[27]#
T24
D[28]#
R24
D[29]#
L26
D[3]#
H22
D[30]#
T25
D[31]#
N24
D[32]#
AA23
D[33]#
AB24
D[34]#
V24
D[35]#
V26
D[36]#
W25
D[37]#
U23
D[38]#
U25
D[39]#
U22
D[4]#
F23
D[40]#
AB25
D[41]#
W22
D[42]#
Y23
D[43]#
AA26
D[44]#
Y26
D[45]#
Y22
D[46]#
AC26
D[47]#
AA24
D[48]#
AC22
D[49]#
AC23
D[5]#
G25
D[50]#
AB22
D[51]#
AA21
D[52]#
AB21
D[53]#
AC25
D[54]#
AD20
D[55]#
AE22
D[56]#
AF23
D[57]#
AD24
D[58]#
AE21
D[59]#
AD21
D[6]#
E25
D[60]#
AE25
D[61]#
AF25
D[62]#
AF22
D[63]#
AF26
D[7]#
E23
D[8]#
K24
D[9]#
G24
TEST2
D25
DINV[0]#
J26
DINV[1]#
M26
DINV[2]#
V23
DINV[3]#
AC20
DPRSTP#
E5
DPSLP#
B5
DPWR#
D24
DSTBN[0]#
H23
DSTBN[1]#
M24
DSTBN[2]#
W24
DSTBN[3]#
AD23
DSTBP[0]#
G22
DSTBP[1]#
N25
DSTBP[2]#
Y25
DSTBP[3]#
AE24
GTLREF
AD26
PSI#
AE6
PWRGOOD
D6
SLP#
D7
TEST1
C26
BSEL[0]
B22
BSEL[1]
B23
BSEL[2]
C21
DATA GRP 0 DATA GRP 1
DATA GRP 2
DATA GRP 3
MISC
U58B
BGA479-SKT6-GPU1
DATA GRP 0 DATA GRP 1
DATA GRP 2
DATA GRP 3
MISC
U58B
BGA479-SKT6-GPU1
1 2
R137
Do Not Stuff
DY
R137
Do Not Stuff
DY
TP41Do Not StuffTP41Do Not Stuff
TP43 Do Not StuffTP43 Do Not Stuff
TP34 Do Not StuffTP34 Do Not Stuff
TP10 Do Not StuffTP10 Do Not Stuff
TP47 Do Not StuffTP47 Do Not Stuff
1 2
R143 Do Not Stuff
DY
R143 Do Not Stuff
DY
TP40Do Not StuffTP40Do Not Stuff
TP51 Do Not StuffTP51 Do Not Stuff
TP13 Do Not StuffTP13 Do Not Stuff
12
C226
SC2200P50V2KX-2GP
C226
SC2200P50V2KX-2GP
12
R138
56R2J-4-GP
R138
56R2J-4-GP
1 2
R199 54D9R2F-L1-GPR199 54D9R2F-L1-GP
TP37Do Not StuffTP37Do Not Stuff
TP46 Do Not StuffTP46 Do Not Stuff
1 2
R136 Do Not Stuff
DY
R136 Do Not Stuff
DY
TP42 Do Not StuffTP42 Do Not Stuff
TP28Do Not StuffTP28Do Not Stuff
TP33Do Not StuffTP33Do Not Stuff
TP44 Do Not StuffTP44 Do Not Stuff
TP50 Do Not StuffTP50 Do Not Stuff
TP45 Do Not StuffTP45 Do Not Stuff
TP30Do Not StuffTP30Do Not Stuff
1 2
R135
56R2J-4-GP
R135
56R2J-4-GP
TP18 Do Not StuffTP18 Do Not Stuff
TP49 Do Not StuffTP49 Do Not Stuff
TP38Do Not StuffTP38Do Not Stuff
1 2
R205 Do Not Stuff
DY
R205 Do Not Stuff
DY
TP11 Do Not StuffTP11 Do Not Stuff
1 2
R150 51R2F-2-GPR150 51R2F-2-GP
12
C310
SC1KP16V2KX-GP
C310
SC1KP16V2KX-GP
1 2
R156 Do Not Stuff
DY
R156 Do Not Stuff
DY
TP15 Do Not StuffTP15 Do Not Stuff
1 2
R187 27D4R2F-L1-GPR187 27D4R2F-L1-GP
TP35 Do Not StuffTP35 Do Not Stuff
TP32 Do Not StuffTP32 Do Not Stuff
1 2
R191 27D4R2F-L1-GPR191 27D4R2F-L1-GP
1 2
R204 39D2R3F-2-GPR204 39D2R3F-2-GP
1
2 3
4
RN24 SRN0J-6-GPRN24 SRN0J-6-GP
TP12Do Not StuffTP12Do Not Stuff
1 2
R206 680R3F-GPR206 680R3F-GP
A[10]#
N3
A[11]#
P5
A[12]#
P2
A[13]#
L1
A[14]#
P4
A[15]#
P1
A[16]#
R1
A[17]#
Y2
A[18]#
U5
A[19]#
R3
A[20]#
W6
A[21]#
U4
A[22]#
Y5
A[23]#
U2
A[24]#
R4
A[25]#
T5
A[26]#
T3
A[27]#
W3
A[28]#
W5
A[29]#
Y4
A[3]#
J4
A[30]#
W2
A[31]#
Y1
RSVD[01]
AA1
RSVD[02]
AA4
RSVD[03]
AB2
RSVD[04]
AA3
RSVD[05]
M4
RSVD[06]
N5
RSVD[07]
T2
RSVD[08]
V3
A[4]#
L4
A[5]#
M3
A[6]#
K5
A[7]#
M1
A[8]#
N2
A[9]#
J1
A20M#
A6
ADS#
H1
ADSTB[0]#
L2
ADSTB[1]#
V4
RSVD[09]
B2
RSVD[10]
C3
BCLK[0]
A22
BCLK[1]
A21
BNR#
E2
BPM[0]#
AD4
BPM[1]#
AD3
BPM[2]#
AD1
BPM[3]#
AC4
BPRI#
G5
BR0#
F1
DBR#
C20
DBSY#
E1
DEFER#
H5
DRDY#
F21
FERR#
A5
RSVD[11]
B25
HIT#
G6
HITM#
E4
IERR#
D20
IGNNE#
C4
INIT#
B3
LINT0
C6
LINT1
B4
LOCK#
H4
PRDY#
AC2
PREQ#
AC1
PROCHOT#
D21
REQ[0]#
K3
REQ[1]#
H2
REQ[2]#
K2
REQ[3]#
J3
REQ[4]#
L5
RESET#
B1
RS[0]#
F3
RS[1]#
F4
RS[2]#
G3
SMI#
A3
STPCLK#
D5
TCK
AC5
TDI
AA6
TDO
AB3
THERMTRIP#
C7
THERMDA
A24
THERMDC
A25
TMS
AB5
TRDY#
G2
TRST#
AB6
RSVD[13]
D2
RSVD[14]
F6
RSVD[15]
D3
RSVD[16]
C1
RSVD[17]
AF1
RSVD[18]
D22
RSVD[19]
C23
RSVD[20]
C24
RSVD[12]
T22
ADDR GROUP 0
ADDR GROUP 1
CONTROL
XDP/ITP SIGNALSH CLK
THERM
RESERVED
U58A
BGA479-SKT6-GPU1
62.10079.001
ADDR GROUP 0
ADDR GROUP 1
CONTROL
XDP/ITP SIGNALSH CLK
THERM
RESERVED
U58A
BGA479-SKT6-GPU1
62.10079.001
12
R214
2KR2F-3-GP
R214
2KR2F-3-GP
TP9Do Not StuffTP9Do Not Stuff
12
R215
1KR2F-3-GP
R215
1KR2F-3-GP
TP39 Do Not StuffTP39 Do Not Stuff
1 2
R208 27D4R2F-L1-GPR208 27D4R2F-L1-GP
TP16 Do Not StuffTP16 Do Not Stuff
TP23 Do Not StuffTP23 Do Not Stuff
TP27Do Not StuffTP27Do Not Stuff
1 2
R203 150R2F-1-GPR203 150R2F-1-GP
1 2
R198 54D9R2F-L1-GPR198 54D9R2F-L1-GP
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
CPU_V6
VCC_CORE_S0
1D5V_S0
1D05V_S0
1D5V_VCCA_S0
1D05V_S0
VCC_CORE_S0
VCC_CORE_S0
VCC_CORE_S0
VCC_CORE_S0
H_VID1 38
H_VID2 38
H_VID3 38
H_VID4 38
H_VID5 38
H_VID0 38
H_VID[0..6] 38
H_VID6 38
VCC_SENSE 38
VSS_SENSE 38
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CPU (2 of 2)
A3
5 55Thursday, April 20, 2006
AG3 2
BOM
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CPU (2 of 2)
A3
5 55Thursday, April 20, 2006
AG3 2
BOM
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CPU (2 of 2)
A3
5 55Thursday, April 20, 2006
AG3 2
BOM
Layout Note:
should be of equal length.
VCCSENSE and VSSSENSE lines
Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.
Layout Note
12
C609
SC10U10V5KX-2GP
C609
SC10U10V5KX-2GP
12
C586
SC10U10V5KX-2GP
C586
SC10U10V5KX-2GP
12
C618
Do Not Stuff
DY
C618
Do Not Stuff
DY
12
C274
SCD1U10V2KX-4GP
C274
SCD1U10V2KX-4GP
12
C582
SC10U10V5KX-2GP
C582
SC10U10V5KX-2GP
12
R211
100R2F-L1-GP-U
R211
100R2F-L1-GP-U
12
C285
SCD1U10V2KX-4GP
C285
SCD1U10V2KX-4GP
12
C218
SC4D7U6D3V3KX-GP
C218
SC4D7U6D3V3KX-GP
12
C578
SC10U10V5KX-2GP
C578
SC10U10V5KX-2GP
12
C249
SCD1U10V2KX-4GP
C249
SCD1U10V2KX-4GP
1 2
L4
HCB1608KF121T30-GP
68.00230.041
L4
HCB1608KF121T30-GP
68.00230.041
12
C619
SC10U10V5KX-2GP
C619
SC10U10V5KX-2GP
12
C617
Do Not Stuff
DY
C617
Do Not Stuff
DY
12
C294
SCD1U10V2KX-4GP
C294
SCD1U10V2KX-4GP
12
C221
SCD01U16V2KX-3GP
C221
SCD01U16V2KX-3GP
12
C583
Do Not Stuff
DY
C583
Do Not Stuff
DY
12
C581
SC10U10V5KX-2GP
C581
SC10U10V5KX-2GP
12
C250
Do Not Stuff
DY
C250
Do Not Stuff
DY
12
C580
SC10U10V5KX-2GP
C580
SC10U10V5KX-2GP
12
C271
SCD1U10V2KX-4GP
C271
SCD1U10V2KX-4GP
12
C615
SC10U10V5KX-2GP
C615
SC10U10V5KX-2GP
VCC[001]
A7
VCC[002]
A9
VCC[003]
A10
VCC[004]
A12
VCC[005]
A13
VCC[006]
A15
VCC[007]
A17
VCC[008]
A18
VCC[009]
A20
VCC[010]
B7
VCC[011]
B9
VCC[012]
B10
VCC[013]
B12
VCC[014]
B14
VCC[015]
B15
VCC[016]
B17
VCC[017]
B18
VCC[018]
B20
VCC[019]
C9
VCC[020]
C10
VCC[021]
C12
VCC[022]
C13
VCC[023]
C15
VCC[024]
C17
VCC[025]
C18
VCC[026]
D9
VCC[027]
D10
VCC[028]
D12
VCC[029]
D14
VCC[030]
D15
VCC[031]
D17
VCC[032]
D18
VCC[033]
E7
VCC[034]
E9
VCC[035]
E10
VCC[036]
E12
VCC[037]
E13
VCC[038]
E15
VCC[039]
E17
VCC[040]
E18
VCC[041]
E20
VCC[042]
F7
VCC[043]
F9
VCC[044]
F10
VCC[045]
F12
VCC[046]
F14
VCC[047]
F15
VCC[048]
F17
VCC[049]
F18
VCC[050]
F20
VCC[051]
AA7
VCC[052]
AA9
VCC[053]
AA10
VCC[054]
AA12
VCC[055]
AA13
VCC[056]
AA15
VCC[057]
AA17
VCC[058]
AA18
VCC[059]
AA20
VCC[060]
AB9
VCC[061]
AC10
VCC[062]
AB10
VCC[063]
AB12
VCC[064]
AB14
VCC[065]
AB15
VCC[066]
AB17
VCC[067]
AB18
VCC[068]
AB20
VCC[069]
AB7
VCC[070]
AC7
VCC[071]
AC9
VCC[072]
AC12
VCC[073]
AC13
VCC[074]
AC15
VCC[075]
AC17
VCC[076]
AC18
VCC[077]
AD7
VCC[078]
AD9
VCC[079]
AD10
VCC[080]
AD12
VCC[081]
AD14
VCC[082]
AD15
VCC[083]
AD17
VCC[084]
AD18
VCC[085]
AE9
VCC[086]
AE10
VCC[087]
AE12
VCC[088]
AE13
VCC[089]
AE15
VCC[090]
AE17
VCC[091]
AE18
VCC[092]
AE20
VCC[093]
AF9
VCC[094]
AF10
VCC[095]
AF12
VCC[096]
AF14
VCC[097]
AF15
VCC[098]
AF17
VCC[099]
AF18
VCC[100]
AF20
VCCA
B26
VCCP[01]
V6
VCCP[02]
G21
VCCP[03]
J6
VCCP[04]
K6
VCCP[05]
M6
VCCP[06]
J21
VCCP[07]
K21
VCCP[08]
M21
VCCP[09]
N21
VCCP[10]
N6
VCCP[11]
R21
VCCP[12]
R6
VCCP[13]
T21
VCCP[14]
T6
VCCP[15]
V21
VCCP[16]
W21
VCCSENSE
AF7
VID[0]
AD6
VID[1]
AF5
VID[2]
AE5
VID[3]
AF4
VID[4]
AE3
VID[5]
AF2
VID[6]
AE2
VSSSENSE
AE7
U58C
BGA479-SKT6-GPU1
U58C
BGA479-SKT6-GPU1
VSS[082]
P6
VSS[148]
AE11
VSS[002]
A8
VSS[003]
A11
VSS[004]
A14
VSS[005]
A16
VSS[006]
A19
VSS[007]
A23
VSS[008]
A26
VSS[009]
B6
VSS[010]
B8
VSS[011]
B11
VSS[012]
B13
VSS[013]
B16
VSS[014]
B19
VSS[015]
B21
VSS[016]
B24
VSS[017]
C5
VSS[018]
C8
VSS[019]
C11
VSS[020]
C14
VSS[021]
C16
VSS[022]
C19
VSS[023]
C2
VSS[024]
C22
VSS[025]
C25
VSS[026]
D1
VSS[027]
D4
VSS[028]
D8
VSS[029]
D11
VSS[030]
D13
VSS[031]
D16
VSS[032]
D19
VSS[033]
D23
VSS[034]
D26
VSS[035]
E3
VSS[036]
E6
VSS[037]
E8
VSS[038]
E11
VSS[039]
E14
VSS[040]
E16
VSS[041]
E19
VSS[042]
E21
VSS[043]
E24
VSS[044]
F5
VSS[045]
F8
VSS[046]
F11
VSS[047]
F13
VSS[048]
F16
VSS[049]
F19
VSS[050]
F2
VSS[051]
F22
VSS[052]
F25
VSS[053]
G4
VSS[054]
G1
VSS[055]
G23
VSS[056]
G26
VSS[057]
H3
VSS[058]
H6
VSS[059]
H21
VSS[060]
H24
VSS[061]
J2
VSS[062]
J5
VSS[063]
J22
VSS[064]
J25
VSS[065]
K1
VSS[066]
K4
VSS[067]
K23
VSS[068]
K26
VSS[069]
L3
VSS[070]
L6
VSS[071]
L21
VSS[072]
L24
VSS[073]
M2
VSS[074]
M5
VSS[075]
M22
VSS[076]
M25
VSS[077]
N1
VSS[078]
N4
VSS[079]
N23
VSS[080]
N26
VSS[081]
P3
VSS[162]
AF24
VSS[161]
AF21
VSS[160]
AF19
VSS[159]
AF16
VSS[158]
AF13
VSS[157]
AF11
VSS[156]
AF8
VSS[155]
AF6
VSS[154]
AF3
VSS[153]
AE26
VSS[152]
AE23
VSS[151]
AE19
VSS[083]
P21
VSS[084]
P24
VSS[085]
R2
VSS[086]
R5
VSS[087]
R22
VSS[088]
R25
VSS[089]
T1
VSS[090]
T4
VSS[091]
T23
VSS[092]
T26
VSS[093]
U3
VSS[094]
U6
VSS[095]
U21
VSS[096]
U24
VSS[097]
V2
VSS[098]
V5
VSS[099]
V22
VSS[100]
V25
VSS[101]
W1
VSS[102]
W4
VSS[103]
W23
VSS[104]
W26
VSS[105]
Y3
VSS[107]
Y21
VSS[108]
Y24
VSS[109]
AA2
VSS[110]
AA5
VSS[111]
AA8
VSS[112]
AA11
VSS[113]
AA14
VSS[114]
AA16
VSS[115]
AA19
VSS[116]
AA22
VSS[117]
AA25
VSS[118]
AB1
VSS[119]
AB4
VSS[120]
AB8
VSS[121]
AB11
VSS[122]
AB13
VSS[123]
AB16
VSS[124]
AB19
VSS[125]
AB23
VSS[126]
AB26
VSS[127]
AC3
VSS[128]
AC6
VSS[129]
AC8
VSS[130]
AC11
VSS[131]
AC14
VSS[132]
AC16
VSS[133]
AC19
VSS[134]
AC21
VSS[135]
AC24
VSS[136]
AD2
VSS[137]
AD5
VSS[138]
AD8
VSS[139]
AD11
VSS[140]
AD13
VSS[141]
AD16
VSS[142]
AD19
VSS[143]
AD22
VSS[144]
AD25
VSS[145]
AE1
VSS[146]
AE4
VSS[106]
Y6
VSS[001]
A4
VSS[149]
AE14
VSS[150]
AE16
VSS[147]
AE8
U58D
BGA479-SKT6-GPU1
U58D
BGA479-SKT6-GPU1
1 2
R196
Do Not Stuff
R196
Do Not Stuff
12
C248
Do Not Stuff
DY
C248
Do Not Stuff
DY
12
C291
Do Not Stuff
DY
C291
Do Not Stuff
DY
12
C246
SCD1U10V2KX-4GP
C246
SCD1U10V2KX-4GP
12
C611
SC10U10V5KX-2GP
C611
SC10U10V5KX-2GP
12
C614
Do Not Stuff
DY
C614
Do Not Stuff
DY
12
C579
Do Not Stuff
DY
C579
Do Not Stuff
DY
12
C298
SC4D7U6D3V3KX-GP
C298
SC4D7U6D3V3KX-GP
12
C610
Do Not Stuff
DY
C610
Do Not Stuff
DY
12
C260
SCD1U10V2KX-4GP
C260
SCD1U10V2KX-4GP
12
C584
SC10U10V5KX-2GP
C584
SC10U10V5KX-2GP
12
R212
100R2F-L1-GP-U
R212
100R2F-L1-GP-U
12
C247
SCD1U10V2KX-4GP
C247
SCD1U10V2KX-4GP
12
C577
SC10U10V5KX-2GP
C577
SC10U10V5KX-2GP
12
C613
SC10U10V5KX-2GP
C613
SC10U10V5KX-2GP
12
C286
Do Not Stuff
DY
C286
Do Not Stuff
DY
剩余54页未读,继续阅读
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