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ILI9335
a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
Datasheet
Version: V0.19
Document No.: ILI9335DS_V0.19.pdf
ILI TECHNOLOGY CORP.
8F, No.38, Taiyuan St., Jhubei City, Hsinchu County 302,
Taiwan, R.O.C
Tel.886-3-5600099; Fax.886-3-5600055
http://
www.ilitek.com
a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
ILI9335
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be di
stributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 2 of 113 Version: 0.19
Table of Contents
Section Page
1.
Introduction.................................................................................................................................................... 7
2.
Features ........................................................................................................................................................ 8
3.
Block Diagram ............................................................................................................................................. 10
4.
Pin Descriptions .......................................................................................................................................... 11
5.
Pad Arrangement and Coordination............................................................................................................ 15
6.
Block Description ........................................................................................................................................ 25
7.
System Interface ......................................................................................................................................... 27
7.1.
Interface Specifications .................................................................................................................. 27
7.2.
Input Interfaces .............................................................................................................................. 28
7.2.1.
i80/18-bit System Interface.................................................................................................. 29
7.2.2.
i80/16-bit System Interface (DB[15:0]) ................................................................................ 30
7.2.3.
i80/16-bit System Interface (DB[17:10][8:1]) ....................................................................... 30
7.2.4.
i80/9-bit System Interface (DB[17:9]) .................................................................................. 31
7.2.5.
i80/8-bit System Interface (DB[17:10]) ................................................................................ 31
7.3.
Serial Peripheral Interface (SPI) .................................................................................................... 33
7.4.
VSYNC Interface............................................................................................................................ 37
7.5.
RGB Input Interface ....................................................................................................................... 41
7.5.1.
RGB Interface...................................................................................................................... 42
7.5.2.
RGB Interface Timing .......................................................................................................... 43
7.5.3.
Moving Picture Mode........................................................................................................... 45
7.5.4.
6-bit RGB Interface.............................................................................................................. 46
7.5.5.
16-bit RGB Interface............................................................................................................ 47
7.5.6.
18-bit RGB Interface............................................................................................................ 47
7.6.
Interface Timing.............................................................................................................................. 49
8.
Register Descriptions .................................................................................................................................. 50
8.1.
Registers Access............................................................................................................................ 50
8.2.
Instruction Descriptions.................................................................................................................. 53
8.2.1.
Index (IR) ............................................................................................................................. 55
8.2.2.
ID code (R00h) .................................................................................................................... 55
8.2.3.
Driver Output Control (R01h)............................................................................................... 55
8.2.4.
LCD Driving Wave Control (R02h) ...................................................................................... 57
8.2.5.
Entry Mode (R03h) .............................................................................................................. 57
8.2.6.
16bits Data Format Selection (R05h) .................................................................................. 60
8.2.7.
Display Control 1 (R07h) ..................................................................................................... 61
8.2.8.
Display Control 2 (R08h) ..................................................................................................... 62
8.2.9.
Display Control 3 (R09h) ..................................................................................................... 63
8.2.10.
Display Control 4 (R0Ah)..................................................................................................... 64
a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
ILI9335
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be di
stributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 3 of 113 Version: 0.19
8.2.11.
RGB Display Interface Control 1 (R0Ch)............................................................................. 64
8.2.12.
Frame Marker Position (R0Dh)............................................................................................ 65
8.2.13.
RGB Display Interface Control 2 (R0Fh) ............................................................................. 66
8.2.14.
Power Control 1 (R10h)....................................................................................................... 66
8.2.15.
Power Control 2 (R11h) ....................................................................................................... 68
8.2.16.
Power Control 3 (R12h)....................................................................................................... 69
8.2.17.
Power Control 4 (R13h)....................................................................................................... 70
8.2.18.
GRAM Horizontal/Vertical Address Set (R20h, R21h) ........................................................ 70
8.2.19.
Write Data to GRAM (R22h)................................................................................................ 71
8.2.20.
Read Data from GRAM (R22h) ........................................................................................... 71
8.2.21.
Power Control 7 (R29h)....................................................................................................... 73
8.2.22.
Frame Rate and Color Control (R2Bh)................................................................................ 73
8.2.23.
Gamma Control (R30h ~ R3Dh).......................................................................................... 74
8.2.24.
Horizontal and Vertical RAM Address Position (R50h, R51h, R52h, R53h) ....................... 74
8.2.25.
Gate Scan Control (R60h, R61h, R6Ah) ............................................................................. 76
8.2.26.
Partial Image 1 Display Position (R80h).............................................................................. 78
8.2.27.
Partial Image 1 RAM Start/End Address (R81h, R82h)....................................................... 78
8.2.28.
Partial Image 2 Display Position (R83h).............................................................................. 78
8.2.29.
Partial Image 2 RAM Start/End Address (R84h, R85h)....................................................... 78
8.2.30.
Panel Interface Control 1 (R90h)......................................................................................... 79
8.2.31.
Panel Interface Control 2 (R92h)......................................................................................... 79
8.2.32.
Panel Interface Control 4 (R95h)......................................................................................... 80
8.2.33.
Panel Interface Control 5 (R97h)......................................................................................... 80
8.2.34.
OTP VCM Programming Control (RA1h) ............................................................................ 81
8.2.35.
OTP VCM Status and Enable (RA2h).................................................................................. 81
8.2.36.
OTP Programming ID Key (RA5h) ...................................................................................... 81
8.2.37.
Deep stand by control (RE6h) ............................................................................................. 82
9.
OTP Programming Flow.............................................................................................................................. 84
10.
GRAM Address Map & Read/Write ............................................................................................................. 85
11.
Window Address Function........................................................................................................................... 90
12.
Gamma Correction...................................................................................................................................... 91
13.
Application................................................................................................................................................... 99
13.1.
Configuration of Power Supply Circuit ........................................................................................... 99
13.2.
Display ON/OFF Sequence.......................................................................................................... 101
13.3.
Standby and Sleep Mode ............................................................................................................. 102
13.4.
Power Supply Configuration......................................................................................................... 103
13.5.
Voltage Generation ...................................................................................................................... 104
13.6.
Applied Voltage to the TFT panel................................................................................................. 105
13.7.
Partial Display Function ............................................................................................................... 105
a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
ILI9335
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be di
stributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 4 of 113 Version: 0.19
14.
Electrical Characteristics........................................................................................................................... 107
14.1.
Absolute Maximum Ratings ......................................................................................................... 107
14.2.
DC Characteristics ....................................................................................................................... 108
14.3.
Reset Timing Characteristics ....................................................................................................... 108
14.4.
AC Characteristics ....................................................................................................................... 109
14.4.1.
i80-System Interface Timing Characteristics ..................................................................... 109
14.4.2.
Serial Data Transfer Interface Timing Characteristics....................................................... 110
14.4.3.
RGB Interface Timing Characteristics ................................................................................111
14.4.4.
Vcom Driving ..................................................................................................................... 112
15.
Revision History ........................................................................................................................................ 113
a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
ILI9335
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be di
stributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 5 of 113 Version: 0.19
Figures
F
IGURE
1
S
YSTEM
I
NTERFACE AND
RGB
I
NTERFACE CONNECTION
.................................................................................... 28
F
IGURE
2
18-
BIT
S
YSTEM
I
NTERFACE
D
ATA
F
ORMAT
......................................................................................................... 29
F
IGURE
3
16-
BIT
S
YSTEM
I
NTERFACE
D
ATA
F
ORMAT
......................................................................................................... 30
F
IGURE
4
9-
BIT
S
YSTEM
I
NTERFACE
D
ATA
F
ORMAT
........................................................................................................... 31
F
IGURE
6
D
ATA
F
ORMAT OF
SPI
I
NTERFACE
..................................................................................................................... 34
F
IGURE
7
D
ATA TRANSMISSION THROUGH SERIAL PERIPHERAL INTERFACE
(SPI) ............................................................... 35
F
IGURE
8
D
ATA TRANSMISSION THROUGH SERIAL PERIPHERAL INTERFACE
(SPI),
TRI=”1”
AND
DFM=”10”).................... 36
F
IGURE
9
D
ATA TRANSMISSION THROUGH
VSYNC
INTERFACE
)......................................................................................... 37
F
IGURE
10
M
OVING PICTURE DATA TRANSMISSION THROUGH
VSYNC
INTERFACE
............................................................ 37
F
IGURE
11
O
PERATION THROUGH
VSYNC
I
NTERFACE
....................................................................................................... 38
F
IGURE
13
RGB
I
NTERFACE
D
ATA
F
ORMAT
...................................................................................................................... 41
F
IGURE
14
GRAM
A
CCESS
A
REA BY
RGB
I
NTERFACE
..................................................................................................... 42
F
IGURE
15
T
IMING
C
HART OF
S
IGNALS IN
18-/16-
BIT
RGB
I
NTERFACE
M
ODE
.................................................................. 43
F
IGURE
16
T
IMING CHART OF SIGNALS IN
6-
BIT
RGB
INTERFACE MODE
............................................................................ 44
F
IGURE
17
E
XAMPLE OF UPDATE THE STILL AND MOVING PICTURE
.................................................................................... 45
F
IGURE
18
I
NTERNAL CLOCK OPERATION
/RGB
INTERFACE MODE SWITCHING
................................................................... 48
F
IGURE
20
R
ELATIONSHIP BETWEEN
RGB
I/F
SIGNALS AND
LCD
D
RIVING
S
IGNALS FOR
P
ANEL
..................................... 49
F
IGURE
21
R
EGISTER
S
ETTING WITH
S
ERIAL
P
ERIPHERAL
I
NTERFACE
(SPI)...................................................................... 50
F
IGURE
22
R
EGISTER SETTING WITH I
80
S
YSTEM
I
NTERFACE
............................................................................................ 51
F
IGURE
23
R
EGISTER
R
EAD
/W
RITE
T
IMING OF I
80
S
YSTEM
I
NTERFACE
........................................................................... 52
F
IGURE
24
GRAM
A
CCESS
D
IRECTION
S
ETTING
............................................................................................................... 57
F
IGURE
26
8-
BIT
MPU
S
YSTEM
I
NTERFACE
D
ATA
F
ORMAT
............................................................................................... 59
F
IGURE
27
D
ATA
R
EAD FROM
GRAM
THROUGH
R
EAD
D
ATA
R
EGISTER IN
18-/16-/9-/8-
BIT
I
NTERFACE
M
ODE
.............. 71
F
IGURE
28
GRAM
D
ATA
R
EAD
B
ACK
F
LOW
C
HART
........................................................................................................ 72
F
IGURE
29
GRAM
A
CCESS
R
ANGE
C
ONFIGURATION
........................................................................................................ 75
F
IGURE
30
GRAM
R
EAD
/W
RITE
T
IMING OF I
80-S
YSTEM
I
NTERFACE
............................................................................... 85
F
IGURE
31
I
80-S
YSTEM
I
NTERFACE WITH
18-/16-/9-
BIT
D
ATA
B
US
(SS=”0”,
BGR=”0”) ................................................. 87
F
IGURE
32
I
80-S
YSTEM
I
NTERFACE WITH
8-
BIT
D
ATA
B
US
(SS=”0”,
BGR=”0”) .............................................................. 88
F
IGURE
33
I
80-S
YSTEM
I
NTERFACE WITH
18-/9-
BIT
D
ATA
B
US
(SS=”1”,
BGR=”1”) ....................................................... 89
F
IGURE
34
GRAM
A
CCESS
W
INDOW
M
AP
....................................................................................................................... 90
F
IGURE
35
G
RAYSCALE
V
OLTAGE
G
ENERATION
............................................................................................................... 91
F
IGURE
36
G
RAYSCALE
V
OLTAGE
A
DJUSTMENT
.............................................................................................................. 92
F
IGURE
37
G
AMMA
C
URVE
A
DJUSTMENT
......................................................................................................................... 93
F
IGURE
38
E
XAMPLE OF
RMP(N)0~5
DEFINITION
............................................................................................................. 95
F
IGURE
39
R
ELATIONSHIP BETWEEN
S
OURCE
O
UTPUT AND
VCOM ................................................................................. 98
F
IGURE
40
R
ELATIONSHIP BETWEEN
GRAM
D
ATA AND
O
UTPUT
L
EVEL
.......................................................................... 98
F
IGURE
41
P
OWER
S
UPPLY
C
IRCUIT
B
LOCK
...................................................................................................................... 99
F
IGURE
42
D
ISPLAY
O
N
/O
FF
R
EGISTER
S
ETTING
S
EQUENCE
.......................................................................................... 101
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