FPGAXC7A100T驱动LED流水灯（VerilogHDL实现）.zip资源-CSDN文库

共156个文件

pb：18个

xml：17个

rst：16个

版权申诉

FPGA

VerilogHDL

驱动程序

85 浏览量 2023-04-04 16:45:09 上传评论收藏 1.06MB ZIP 举报

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FPGA XC7A100T驱动LED流水灯（Verilog HDL实现）.zip （156个子文件）

__synthesis_is_complete__ 0B

elaborate.bat 917B

compile.bat 840B

simulate.bat 807B

runme.bat 229B

flow_led.bit 3.65MB

xsim_1.c 5KB

xsim.dbg 6KB

flow_led_routed.dcp 150KB

flow_led_placed.dcp 143KB

flow_led_opt.dcp 129KB

flow_led.dcp 18KB

xsimk.exe 68KB

usage_statistics_webtalk.html 31KB

usage_statistics_ext_xsim.html 3KB

usage_statistics_ext_labtool.html 3KB

.xsim_webtallk.info 64B

.xsim_webtallk.info 59B

xsimSettings.ini 1KB

xsim.ini 40B

vivado.jou 816B

vivado.jou 811B

webtalk.jou 792B

webtalk_17056.backup.jou 792B

webtalk_15980.backup.jou 792B

webtalk_1248.backup.jou 791B

ISEWrap.js 8KB

rundef.js 1KB

runme.log 26KB

runme.log 18KB

webtalk_15980.backup.log 1KB

webtalk_17056.backup.log 1KB

webtalk.log 1KB

webtalk_1248.backup.log 1KB

elaborate.log 931B

labtool_webtalk.log 658B

xvlog.log 350B

compile.log 350B

xsimkernel.log 332B

simulate.log 50B

xsimcrash.log 0B

flow_led.lpr 343B

xsim.mem 3KB

xsim_0.win64.obj 7KB

xsim_1.win64.obj 3KB

vivado.pb 28KB

place_design.pb 12KB

route_design.pb 12KB

opt_design.pb 12KB

write_bitstream.pb 3KB

init_design.pb 3KB

xelab.pb 2KB

flow_led_power_summary_routed.pb 722B

xvlog.pb 650B

flow_led_utilization_placed.pb 276B

flow_led_utilization_synth.pb 276B

vivado.pb 149B

flow_led_methodology_drc_routed.pb 52B

flow_led_timing_summary_routed.pb 52B

flow_led_route_status.pb 43B

flow_led_drc_opted.pb 37B

flow_led_drc_routed.pb 37B

flow_led_bus_skew_routed.pb 30B

flow_led_tb_vlog.prj 289B

xsim.reloc 1KB

xsim.rlx 784B

xil_defaultlib.rlx 366B

flow_led_io_placed.rpt 144KB

flow_led_clock_utilization_routed.rpt 11KB

flow_led_utilization_placed.rpt 9KB

flow_led_power_routed.rpt 7KB

flow_led_timing_summary_routed.rpt 7KB

flow_led_utilization_synth.rpt 7KB

flow_led_methodology_drc_routed.rpt 6KB

flow_led_control_sets_placed.rpt 4KB

flow_led_drc_routed.rpt 2KB

flow_led_drc_opted.rpt 2KB

flow_led_bus_skew_routed.rpt 881B

flow_led_route_status.rpt 588B

flow_led_power_routed.rpx 19KB

flow_led_methodology_drc_routed.rpx 7KB

flow_led_timing_summary_routed.rpx 6KB

flow_led_drc_routed.rpx 2KB

flow_led_drc_opted.rpx 2KB

flow_led_bus_skew_routed.rpx 1KB

.vivado.begin.rst 229B

.route_design.begin.rst 190B

.opt_design.begin.rst 190B

.write_bitstream.begin.rst 190B

.place_design.begin.rst 190B

.init_design.begin.rst 190B

.vivado.end.rst 0B

.init_design.end.rst 0B

.Vivado_Implementation.queue.rst 0B

.write_bitstream.end.rst 0B

.route_design.end.rst 0B

共 156 条

The files in this directory structure are automatically generated and managed by Vivado. Editing these files is not recommended.

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