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Altera Corporation Section I–1

Preliminary

Section I. Cyclone II

Device Family Data Sheet

This section provides information for board layout designers to

successfully layout their boards for Cyclone

™

II devices. It contains the

required PCB layout guidelines, device pin tables, and package

specifications.

This section includes the following chapters:

■ Chapter 1. Introduction

■ Chapter 2. Cyclone II Architecture

■ Chapter 3. Configuration & Testing

■ Chapter 4. Hot Socketing & Power-On Reset

■ Chapter 5. DC Characteristics & Timing Specifications

■ Chapter 6. Reference & Ordering Information

Revision History

The table below shows the revision history for Chapters 1 through 6.

Chapter Date / Version Changes Made Comments

1 June 2006, v3.0 ● Added information for the EP2C15 device.

● Added information for “A” devices.

● Updated all Tables.

November 2005, v2.1

● Updated Introduction and Features.

● Updated Table 1–3.

July 2005, v2.0

● Updated technical content throughout.

● Updated Table 1–2.

● Added Tables 1–3 and 1–4.

November 2004, v1.1

● Updated Table 1–2.

● Updated bullet list in the “Features” section.

June 2004 v1.0 Added document to the Cyclone II Device

Handbook.

Altera Corporation 1–1

June 2006

1. Introduction

Introduction

Following the immensely successful first-generation Cyclone

™

device

family, Altera

Cyclone II FPGAs extend the low-cost FPGA density

range to 68,416 logic elements (LEs) and provide up to 622 usable I/O

pins and up to 1.1 Mbits of embedded memory. Cyclone II FPGAs are

manufactured on 300-mm wafers using TSMC's 90-nm low-k dielectric

process to ensure rapid availability and low cost. By minimizing silicon

area, Cyclone II devices can support complex digital systems on a single

chip at a cost that rivals that of ASICs. Unlike other FPGA vendors who

compromise power consumption and performance for low-cost, Altera’s

latest generation of low-cost FPGAs —Cyclone II FPGAs, offer 60 percent

higher performance and half the power consumption of competing

90-nm FPGAs. The low cost and optimized feature set of Cyclone II

FPGAs make them ideal solutions for a wide array of automotive,

consumer, communications, video processing, test and measurement,

and other end-market solutions. Reference designs, system diagrams,

and IP, found at www.Altera.com, are available to help you rapidly

develop complete end-market solutions using Cyclone II FPGAs.

Low-Cost Embedded Processing Solutions

Cyclone II devices support the Nios II embedded processor which allows

you to implement custom-fit embedded processing solutions. Cyclone II

devices can also expand the peripheral set, memory, I/O, or performance

of embedded processors. Single or multiple Nios II embedded processors

can be designed into a Cyclone II device to provide additional

co-processing power or even replace existing embedded processors in

your system. Using Cyclone II and Nios II together allow for low-cost,

high-performance embedded processing solutions which allow you to

extend your product's life cycle and improve time to market over

standard product solutions.

Low-Cost DSP Solutions

Use Cyclone II FPGAs alone or as DSP co-processors to improve

price-to-performance ratios for digital signal processing (DSP)

applications. You can implement high-performance yet low-cost DSP

systems with the following Cyclone II features and design support:

■ Up to 150 18 × 18 multipliers

■ Up to 1.1 Mbit of on-chip embedded memory

■ High-speed interfaces to external memory

CII51001-3.0

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