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镁光 MT41J256M16型号DDR3数据手册
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2018-04-21
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镁光的 MT41J256M16型DDR3介绍,里面包括DDR3详细的架构图,以及管脚分配,地址分配等内容
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DDR3 SDRAM
MT41J1G4 – 128 Meg x 4 x 8 banks
MT41J512M8 – 64 Meg x 8 x 8 banks
MT41J256M16 – 32 Meg x 16 x 8 banks
Features
•V
DD
= V
DDQ
= 1.5V ±0.075V
• 1.5V center-terminated push/pull I/O
• Differential bidirectional data strobe
•8n-bit prefetch architecture
• Differential clock inputs (CK, CK#)
• 8 internal banks
• Nominal and dynamic on-die termination (ODT)
for data, strobe, and mask signals
• Programmable CAS READ latency (CL)
• Posted CAS additive latency (AL)
• Programmable CAS WRITE latency (CWL) based on
t
CK
• Fixed burst length (BL) of 8 and burst chop (BC) of 4
(via the mode register set [MRS])
• Selectable BC4 or BL8 on-the-fly (OTF)
• Self refresh mode
•T
C
of 0°C to 95°C
– 64ms, 8192 cycle refresh at 0°C to 85°C
– 32ms, 8192 cycle refresh at 85°C to 95°C
• Self refresh temperature (SRT)
• Write leveling
• Multipurpose register
• Output driver calibration
Options
1
Marking
• Configuration
– 1 Gig x 4 1G4
– 512 Meg x 8 512M8
– 256 Meg x 16 256M16
• FBGA package (Pb-free) – x4, x8
– 78-ball (10.5mm x 12mm) Rev. D RA
– 78-ball (9mm x 10.5mm) Rev. E, J RH
• FBGA package (Pb-free) – x16
– 96-ball (10mm x 14mm) Rev. D RE
– 96-ball (9mm x 14mm) Rev. E HA
• Timing – cycle time
– 938ps @ CL = 14 (DDR3-2133) -093
– 1.071ns @ CL = 13 (DDR3-1866) -107
– 1.25ns @ CL = 11 (DDR3-1600) -125
– 1.5ns @ CL = 9 (DDR3-1333) -15E
– 1.87ns @ CL = 7 (DDR3-1066) -187E
• Operating temperature
– Commercial (0°C ≤ T
C
≤ +95°C) None
– Industrial (–40°C ≤ T
C
≤ +95°C) IT
• Revision :D/:E/:J
Note:
1. Not all options listed can be combined to
define an offered product. Use the part
catalog search on http://www.micron.com
for available offerings.
Table 1: Key Timing Parameters
Speed Grade Data Rate (MT/s) Target
t
RCD-
t
RP-CL
t
RCD (ns)
t
RP (ns) CL (ns)
-093
1, 2, 3, 4
2133 14-14-14 13.09 13.09 13.09
-107
1, 2, 3
1866 13-13-13 13.91 13.91 13.91
-125
1, 2,
1600 11-11-11 13.75 13.75 13.75
-15E
1,
1333 9-9-9 13.5 13.5 13.5
-187E 1066 7-7-7 13.1 13.1 13.1
Notes:
1. Backward compatible to 1066, CL = 7 (-187E).
2. Backward compatible to 1333, CL = 9 (-15E).
3. Backward compatible to 1600, CL = 11 (-125).
4. Backward compatible to 1866, CL = 13 (-107).
4Gb: x4, x8, x16 DDR3 SDRAM
Features
PDF: 09005aef8417277b
4Gb_DDR3_SDRAM.pdf - Rev. M 4/13 EN
1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
Table 2: Addressing
Parameter 1 Gig x 4 512 Meg x 8 256 Meg x 16
Configuration 128 Meg x 4 x 8 banks 64 Meg x 8 x 8 banks 32 Meg x 16 x 8 banks
Refresh count 8K 8K 8K
Row addressing 64K (A[15:0]) 64K (A[15:0]) 32K (A[14:0])
Bank addressing 8 (BA[2:0]) 8 (BA[2:0]) 8 (BA[2:0])
Column addressing 2K (A[11, 9:0]) 1K (A[9:0]) 1K (A[9:0])
Page size 1KB 1KB 2KB
Figure 1: DDR3 Part Numbers
Example Part Number: MT41J512M8RH-125:E
Configuration
1 Gig x 4
512 Meg x 8
256 Meg x 16
1G4
512M8
256M16
-
Configuration
MT41J Package Speed
Revision
Revision
:D/:E/:J
:
Temperatu re
Commercial
Industrial temperature
^
None
IT
Package
96-ball 9mm x 14mm FBGA
96-ball 10.0mm x 14mm FBGA
Mark
HA
RE
Rev.
E
D
78-ball 9mm x 10.5mm FBGA
RHE, J
78-ball 10.5mm x 12mm FBGA
RAD
Speed Grade
t
CK = 1.071ns, CL = 13
t
CK = 1.25ns, CL = 11
t
CK = 1.5ns, CL = 9
t
CK = 1.87ns, CL = E
-107
-125
-15E
-187E
t
CK = 0.938ns, CL = 14-093
Note:
1. Not all options listed can be combined to define an offered product. Use the part catalog search on
http://www.micron.com for available offerings.
FBGA Part Marking Decoder
Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the
part number. For a quick conversion of an FBGA code, see the FBGA Part Marking Decoder on Micron’s Web site:
http://www.micron.com.
4Gb: x4, x8, x16 DDR3 SDRAM
Features
PDF: 09005aef8417277b
4Gb_DDR3_SDRAM.pdf - Rev. M 4/13 EN
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
Contents
State Diagram ................................................................................................................................................ 11
Functional Description ................................................................................................................................... 12
Industrial Temperature ............................................................................................................................... 12
General Notes ............................................................................................................................................ 12
Functional Block Diagrams ............................................................................................................................. 14
Ball Assignments and Descriptions ................................................................................................................. 17
Package Dimensions ....................................................................................................................................... 23
Electrical Specifications .................................................................................................................................. 27
Absolute Ratings ......................................................................................................................................... 27
Input/Output Capacitance .......................................................................................................................... 28
Thermal Characteristics .................................................................................................................................. 29
Electrical Specifications – I
DD
Specifications and Conditions ............................................................................ 31
Electrical Characteristics – I
DD
Specifications .................................................................................................. 42
Electrical Specifications – DC and AC .............................................................................................................. 46
DC Operating Conditions ........................................................................................................................... 46
Input Operating Conditions ........................................................................................................................ 46
AC Overshoot/Undershoot Specification ..................................................................................................... 49
Slew Rate Definitions for Single-Ended Input Signals ................................................................................... 53
Slew Rate Definitions for Differential Input Signals ...................................................................................... 55
ODT Characteristics ....................................................................................................................................... 56
ODT Resistors ............................................................................................................................................ 57
ODT Sensitivity .......................................................................................................................................... 58
ODT Timing Definitions ............................................................................................................................. 58
Output Driver Impedance ............................................................................................................................... 62
34 Ohm Output Driver Impedance .............................................................................................................. 63
34 Ohm Driver ............................................................................................................................................ 64
34 Ohm Output Driver Sensitivity ................................................................................................................ 65
Alternative 40 Ohm Driver .......................................................................................................................... 66
40 Ohm Output Driver Sensitivity ................................................................................................................ 66
Output Characteristics and Operating Conditions ............................................................................................ 68
Reference Output Load ............................................................................................................................... 70
Slew Rate Definitions for Single-Ended Output Signals ................................................................................. 71
Slew Rate Definitions for Differential Output Signals .................................................................................... 72
Speed Bin Tables ............................................................................................................................................ 73
Electrical Characteristics and AC Operating Conditions ................................................................................... 78
Command and Address Setup, Hold, and Derating ........................................................................................... 98
Data Setup, Hold, and Derating ...................................................................................................................... 106
Commands – Truth Tables ............................................................................................................................. 115
Commands ................................................................................................................................................... 118
DESELECT ................................................................................................................................................ 118
NO OPERATION ........................................................................................................................................ 118
ZQ CALIBRATION LONG ........................................................................................................................... 118
ZQ CALIBRATION SHORT .......................................................................................................................... 118
ACTIVATE ................................................................................................................................................. 118
READ ........................................................................................................................................................ 118
WRITE ...................................................................................................................................................... 119
PRECHARGE ............................................................................................................................................. 120
REFRESH .................................................................................................................................................. 120
SELF REFRESH .......................................................................................................................................... 121
DLL Disable Mode ..................................................................................................................................... 122
4Gb: x4, x8, x16 DDR3 SDRAM
Features
PDF: 09005aef8417277b
4Gb_DDR3_SDRAM.pdf - Rev. M 4/13 EN
3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
Input Clock Frequency Change ...................................................................................................................... 126
Write Leveling ............................................................................................................................................... 128
Write Leveling Procedure ........................................................................................................................... 130
Write Leveling Mode Exit Procedure ........................................................................................................... 132
Initialization ................................................................................................................................................. 133
Mode Registers .............................................................................................................................................. 135
Mode Register 0 (MR0) ................................................................................................................................... 136
Burst Length ............................................................................................................................................. 136
Burst Type ................................................................................................................................................. 137
DLL RESET ................................................................................................................................................ 138
Write Recovery .......................................................................................................................................... 138
Precharge Power-Down (Precharge PD) ...................................................................................................... 139
CAS Latency (CL) ....................................................................................................................................... 139
Mode Register 1 (MR1) ................................................................................................................................... 140
DLL Enable/DLL Disable ........................................................................................................................... 140
Output Drive Strength ............................................................................................................................... 141
OUTPUT ENABLE/DISABLE ...................................................................................................................... 141
TDQS Enable ............................................................................................................................................. 141
On-Die Termination .................................................................................................................................. 142
WRITE LEVELING ..................................................................................................................................... 142
POSTED CAS ADDITIVE Latency ................................................................................................................ 142
Mode Register 2 (MR2) ................................................................................................................................... 143
CAS Write Latency (CWL) ........................................................................................................................... 144
AUTO SELF REFRESH (ASR) ....................................................................................................................... 144
SELF REFRESH TEMPERATURE (SRT) ........................................................................................................ 145
SRT vs. ASR ............................................................................................................................................... 145
DYNAMIC ODT ......................................................................................................................................... 145
Mode Register 3 (MR3) ................................................................................................................................... 146
MULTIPURPOSE REGISTER (MPR) ............................................................................................................ 146
MPR Functional Description ...................................................................................................................... 147
MPR Register Address Definitions and Bursting Order ................................................................................. 148
MPR Read Predefined Pattern .................................................................................................................... 154
MODE REGISTER SET (MRS) Command ........................................................................................................ 154
ZQ CALIBRATION Operation ......................................................................................................................... 155
ACTIVATE Operation ..................................................................................................................................... 156
READ Operation ............................................................................................................................................ 158
WRITE Operation .......................................................................................................................................... 169
DQ Input Timing ....................................................................................................................................... 177
PRECHARGE Operation ................................................................................................................................. 179
SELF REFRESH Operation .............................................................................................................................. 179
Extended Temperature Usage ........................................................................................................................ 181
Power-Down Mode ........................................................................................................................................ 182
RESET Operation ........................................................................................................................................... 190
On-Die Termination (ODT) ............................................................................................................................ 192
Functional Representation of ODT ............................................................................................................. 192
Nominal ODT ............................................................................................................................................ 192
Dynamic ODT ............................................................................................................................................... 194
Dynamic ODT Special Use Case ................................................................................................................. 194
Functional Description .............................................................................................................................. 194
Synchronous ODT Mode ................................................................................................................................ 200
ODT Latency and Posted ODT .................................................................................................................... 200
Timing Parameters .................................................................................................................................... 200
4Gb: x4, x8, x16 DDR3 SDRAM
Features
PDF: 09005aef8417277b
4Gb_DDR3_SDRAM.pdf - Rev. M 4/13 EN
4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
ODT Off During READs .............................................................................................................................. 203
Asynchronous ODT Mode .............................................................................................................................. 205
Synchronous to Asynchronous ODT Mode Transition (Power-Down Entry) .................................................. 207
Asynchronous to Synchronous ODT Mode Transition (Power-Down Exit) ........................................................ 209
Asynchronous to Synchronous ODT Mode Transition (Short CKE Pulse) ...................................................... 211
4Gb: x4, x8, x16 DDR3 SDRAM
Features
PDF: 09005aef8417277b
4Gb_DDR3_SDRAM.pdf - Rev. M 4/13 EN
5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
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