基于FPGA的巴克码实现,verilog编程开发+含代码操作演示视频 （253个子文件） 
__synthesis_is_complete__ 0B
操作录像0009.avi 55.67MB elaborate.bat 1KB simulate.bat 908B compile.bat 834B runme.bat 229B xsim_1.c 9KB xsim_1.c 8KB xsim_1.c 5KB xsim_1.c 5KB xsim.dbg 38KB xsim.dbg 24KB xsim.dbg 10KB xsim.dbg 8KB buk.dcp 11KB
xsimk.exe 166KB xsimk.exe 130KB xsimk.exe 95KB xsimk.exe 71KB
usage_statistics_ext_xsim.html 3KB usage_statistics_ext_xsim.html 3KB usage_statistics_ext_xsim.html 3KB usage_statistics_ext_xsim.html 3KB .xsim_webtallk.info 64B .xsim_webtallk.info 64B .xsim_webtallk.info 64B .xsim_webtallk.info 64B xsimSettings.ini 1KB xsimSettings.ini 1KB xsimSettings.ini 1KB xsimSettings.ini 1KB xsim.ini 40B webtalk_1086772.backup.jou 895B webtalk_1088468.backup.jou 895B webtalk.jou 881B webtalk_9856.backup.jou 880B webtalk_1085572.backup.jou 873B webtalk_1082872.backup.jou 873B vivado.jou 693B ISEWrap.js 8KB rundef.js 1KB runme.log 17KB webtalk_1088468.backup.log 1KB webtalk_9856.backup.log 1KB webtalk_1086772.backup.log 1KB webtalk.log 1KB webtalk_1085572.backup.log 1KB webtalk_1082872.backup.log 1KB elaborate.log 601B xsimkernel.log 334B xsimkernel.log 323B xsimkernel.log 316B xsimkernel.log 221B xsimcrash.log 0B xsimcrash.log 0B xsimcrash.log 0B compile.log 0B xsimcrash.log 0B xvlog.log 0B simulate.log 0B project_11.lpr 290B xsim.mem 30KB xsim.mem 14KB sine.mem 5KB sine.mem 5KB xsim.mem 4KB xsim.mem 3KB xsim_0.win64.obj 118KB xsim_0.win64.obj 91KB xsim_0.win64.obj 37KB xsim_0.win64.obj 11KB xsim_1.win64.obj 6KB xsim_1.win64.obj 5KB xsim_1.win64.obj 3KB xsim_1.win64.obj 3KB vivado.pb 27KB xelab.pb 1KB buk_utilization_synth.pb 291B xvlog.pb 16B tb_vlog.prj 1KB FFT128_tb_vlog.prj 697B hw_tbv_vlog.prj 466B cordictanh_tb_vlog.prj 318B barc_tp_vlog.prj 236B xsim.reloc 7KB xsim.reloc 4KB xsim.reloc 2KB xsim.reloc 1KB xsim.rlx 827B xsim.rlx 797B xsim.rlx 792B xsim.rlx 771B xil_defaultlib.rlx 374B buk_utilization_synth.rpt 7KB .vivado.begin.rst 222B .Vivado_Synthesis.queue.rst 0B .vivado.end.rst 0B xsim.rtti 372B xsim.rtti 323B xsim.rtti 323B共 253 条
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