MPU-9250 Register Map and Descriptions
Document Number: RM-MPU-9250A-00
Revision: 1.4
Release Date: 9/9/2013
CONTENTS
1 REVISION HISTORY ................................................................................................................................... 5
2 PURPOSE AND SCOPE ............................................................................................................................. 6
3 REGISTER MAP FOR GYROSCOPE AND ACCELEROMETER .............................................................. 7
4 REGISTER DESCRIPTIONS ..................................................................................................................... 10
4.1 REGISTERS 0 TO 2 – GYROSCOPE SELF-TEST REGISTERS .................................................................. 10
4.2 REGISTERS 13 TO 15 – ACCELEROMETER SELF-TEST REGISTERS ....................................................... 10
4.3 REGISTERS 19 TO 24 – GYRO OFFSET REGISTERS ............................................................................. 11
4.4 REGISTER 25 – SAMPLE RATE DIVIDER .............................................................................................. 12
4.5 REGISTER 26 – CONFIGURATION ........................................................................................................ 12
4.6 REGISTER 27 – GYROSCOPE CONFIGURATION .................................................................................... 13
4.7 REGISTER 28 – ACCELEROMETER CONFIGURATION ............................................................................. 14
4.8 REGISTER 29 – ACCELEROMETER CONFIGURATION 2 .......................................................................... 14
4.9 REGISTER 30 – LOW POWER ACCELEROMETER ODR CONTROL .......................................................... 16
4.10 REGISTER 31 – WAKE-ON MOTION THRESHOLD .................................................................................. 17
4.11 REGISTER 35 – FIFO ENABLE ............................................................................................................ 17
4.12 REGISTER 36 – I2C MASTER CONTROL .............................................................................................. 18
4.13 REGISTERS 37 TO 39 – I
2
C SLAVE 0 CONTROL ................................................................................... 20
REGISTER 37 - I2C_SLV0_ADDR .................................................................................................................. 20
REGISTER 38 - I2C_SLV0_REG .................................................................................................................... 20
REGISTER 39 - I2C_SLV0_CTRL ................................................................................................................... 20
4.14 REGISTERS 40 TO 42 – I
2
C SLAVE 1 CONTROL ................................................................................... 21
REGISTER 40 - I2C_SLV1_ADDR .................................................................................................................. 21
REGISTER 41 - I2C_SLV1_REG .................................................................................................................... 22
REGISTER 42 - I2C_SLV1_CTRL ................................................................................................................... 22
4.15 REGISTERS 43 TO 45 – I
2
C SLAVE 2 CONTROL ................................................................................... 23
REGISTER 43 - I2C_SLV2_ADDR .................................................................................................................. 23
REGISTER 44 - I2C_SLV2_REG .................................................................................................................... 24
REGISTER 45 - I2C_SLV2_CTRL ................................................................................................................... 24
4.16 REGISTERS 46 TO 48 – I
2
C SLAVE 3 CONTROL ................................................................................... 25
REGISTER 46 - I2C_SLV3_ADDR .................................................................................................................. 25
REGISTER 47 - I2C_SLV3_REG .................................................................................................................... 25
REGISTER 48 - I2C_SLV3_CTRL ................................................................................................................... 25
4.17 REGISTERS 49 TO 53 – I
2
C SLAVE 4 CONTROL ................................................................................... 26
2 of 55
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